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git01.mediatek.com / filogic / uboot / da3ae1feb080fbcabfabd19fe669b5fd4234af64 / drivers / clk / renesas / r8a774b1-cpg-mssr.c
  1. 8a8e103 clk: renesas: Synchronize RZ R8A774B1 RZ/G2N clock tables with Linux 6.6.3 by Marek Vasut · Sun Dec 03 14:15:18 2023 +0100
  2. 618da65 clk: renesas: Synchronize R8A774B1 RZ/G2N clock tables with Linux 6.5.3 by Marek Vasut · Sun Sep 17 16:11:39 2023 +0200
  3. f6b3202 clk: renesas: Add and enable CPG reset driver by Marek Vasut · Thu Jan 26 21:02:03 2023 +0100
  4. 43b3fdb clk: renesas: Synchronize R8A774B1 RZ/G2N clock tables with Linux 6.1.7 by Marek Vasut · Thu Jan 26 21:01:58 2023 +0100
  5. 814217e clk: renesas: Make reset controller modemr register offset configurable by Marek Vasut · Sun Apr 25 21:53:05 2021 +0200
  6. 8538d53 clk: renesas: Synchronize RZ/G2 tables with Linux 5.12 by Marek Vasut · Sun Apr 25 21:08:18 2021 +0200
  7. 8a2b47f dm: treewide: Rename auto_alloc_size members to be shorter by Simon Glass · Thu Dec 03 16:55:17 2020 -0700
  8. 69159a2 clk: renesas: Add R8A774B1 clock tables by Biju Das · Wed Oct 14 18:17:35 2020 +0100