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filogic
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uboot
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d1eb93bad135f615cc3750f351b613e458c37c67
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drivers
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ddr
eff11fa
treewide: unify the linker symbol reference format
by Shiji Yang
· Thu Aug 03 09:47:17 2023 +0800
eb3ff92
ddr: imx9: update the rank setting for multi fsp support
by Jacky Bai
· Fri Apr 28 12:08:44 2023 +0800
9ded797
ddr: imx93: update the ddr init to support mult setpoints
by Jacky Bai
· Fri Apr 28 12:08:43 2023 +0800
e747f9f
ddr: imx93: Add 625M bypass clock support
by Jacky Bai
· Fri Apr 28 12:08:42 2023 +0800
8d1ce4b
ddr: imx9: Change the saved ddr data base to 0x2051c000
by Jacky Bai
· Fri Apr 28 12:08:41 2023 +0800
a5163fa
ddr: imx9: Add workaround for DDRPHY rank-to-rank errata
by Ye Li
· Fri Apr 28 12:08:39 2023 +0800
b52189e
drivers: use devfdt_get_addr_index_ptr when cast to pointer
by Johan Jonker
· Mon Mar 13 01:32:31 2023 +0100
0a2ba73
ddr: marvell: a38x: Perform DDR training sequence again for 2nd boot
by Tony Dinh
· Sun Apr 02 21:42:33 2023 -0700
09e3e13
ddr: imx: Update the ddr init flow on imx8ulp
by Jacky Bai
· Tue Jan 31 16:42:29 2023 +0800
53a1d9c
ddr: imx8ulp: Change DRAM timing save area to 0x20055000
by Ye Li
· Tue Jan 31 16:42:19 2023 +0800
fe8eb47
ddr: marvell: a38x: Remove unused file seq_exec.h
by Pali Rohár
· Sat Mar 04 13:26:46 2023 +0100
d79d1d0
ddr: imx: Handle both 3733 and 3732 MTps rates
by Marek Vasut
· Mon Jan 23 17:53:19 2023 +0100
e2c524b
ddr: marvell: a38x: Add support for DDR4 from Marvell mv-ddr-marvell repository
by Tony Dinh
· Wed Jan 18 19:03:04 2023 -0800
364d002
global: Finish CONFIG -> CFG migration
by Tom Rini
· Tue Jan 10 11:19:45 2023 -0500
bc9d46b
global: Migrate CONFIG_MAX_MEM_MAPPED to CFG
by Tom Rini
· Sun Dec 04 10:04:50 2022 -0500
5a6741b
global: Remove undef CONFIG_... for unused values
by Tom Rini
· Sun Dec 04 10:03:34 2022 -0500
d73175a
ddr: fsl: Remove CONFIG_MEM_INIT_VALUE
by Tom Rini
· Fri Dec 02 16:42:35 2022 -0500
0e2867c
Convert CONFIG_SPD_EEPROM to Kconfig
by Tom Rini
· Sat Nov 19 18:45:34 2022 -0500
6a5dccc
global: Move remaining CONFIG_SYS_* to CFG_SYS_*
by Tom Rini
· Wed Nov 16 13:10:41 2022 -0500
bb4dd96
global: Move remaining CONFIG_SYS_SDRAM_* to CFG_SYS_SDRAM_*
by Tom Rini
· Wed Nov 16 13:10:37 2022 -0500
376b88a
global: Migrate CONFIG_SYS_FSL* symbols to the CFG_SYS namespace
by Tom Rini
· Fri Oct 28 20:27:13 2022 -0400
d5c3bf2
global: Migrate CONFIG_SYS_MPC8* symbols to the CFG_SYS namespace
by Tom Rini
· Fri Oct 28 20:27:12 2022 -0400
75a6a37
treewide: Remove the unnecessary space before semicolon
by Bin Meng
· Wed Oct 26 12:40:07 2022 +0800
666bf36
imx8m: fix reading of DDR4 MR registers [again]
by Rasmus Villemoes
· Thu Oct 06 14:56:50 2022 +0200
e917a0b
ddr: fsl: Fix re-align of verbose DRAM information for non-SPL builds
by Pali Rohár
· Fri Sep 09 17:32:45 2022 +0200
af69602
ddr: fsl: Allow to detect 4 GB DDR modules in 32-bit mode
by Pali Rohár
· Fri Sep 09 17:32:44 2022 +0200
ba471ba
ddr: fsl: Fix fsl_ddr_sdram_size() for 4GB modules with 32-bit phys_size_t
by Pali Rohár
· Fri Sep 09 17:32:43 2022 +0200
7624a41
ddr: fsl: Fix checking for maximal mappable memory
by Pali Rohár
· Fri Sep 09 17:32:42 2022 +0200
586c22b
Merge branch 'master' into next
by Tom Rini
· Mon Sep 19 13:19:39 2022 -0400
154e7dd
imx8m: ddrphy_utils: Remove unused file
by Marek Vasut
· Fri Aug 19 13:02:23 2022 +0200
80877fa
cyclic: Use schedule() instead of WATCHDOG_RESET()
by Stefan Roese
· Fri Sep 02 14:10:46 2022 +0200
a072a6c
ddr: fsl: Make bank_addr_bits reflect actual bits
by Sean Anderson
· Tue Aug 30 17:01:07 2022 -0400
0db746c
ddr: fsl: Reduce the size of interactive options
by Sean Anderson
· Tue Aug 30 16:54:39 2022 -0400
f839dd0
Convert CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS et al to Kconfig
by Tom Rini
· Sun Jul 31 21:08:22 2022 -0400
1ab1692
common: Drop display_options.h from common header
by Simon Glass
· Sun Jul 31 12:28:48 2022 -0600
c934e5e
Convert CONFIG_SYS_FSL_DDR_INTLV_256B to Kconfig
by Tom Rini
· Sat Jul 23 13:05:12 2022 -0400
9eba082
ddr: imx8m: helper: load ddr firmware according to binman symbols
by Peng Fan
· Tue Jul 26 16:41:21 2022 +0800
f188a4f
ddr: imx9: enable Performance monitor counter
by Ye Li
· Tue Jul 26 16:41:08 2022 +0800
b2cfc42
ddr: imx: Add i.MX9 DDR controller driver
by Ye Li
· Tue Jul 26 16:41:07 2022 +0800
8e99f7d
Convert CONFIG_SYS_DDR_RAW_TIMING to Kconfig
by Tom Rini
· Wed Jun 15 12:03:55 2022 -0400
afba411
Convert CONFIG_SYS_SPD_BUS_NUM to Kconfig
by Tom Rini
· Wed Jun 15 12:03:54 2022 -0400
44b027d
nxp: Cleanup some emulator related options.
by Tom Rini
· Wed Jun 15 12:03:47 2022 -0400
d9ff2b9
Merge branch 'master' into next
by Tom Rini
· Mon Jun 20 14:40:59 2022 -0400
eeea5ec
ddr: altera: soc64: Integer fix overflow that caused DDR size mismatched
by Dinesh Maniyam
· Wed Jun 01 18:49:02 2022 +0800
851c724
ddr: altera: Stratix10: Use phys_size_t for memory size
by Tien Fong Chee
· Wed Apr 27 12:52:42 2022 +0800
7bcd663
ddr: altera: Ignore bit[7-4] for both seq2core & core2seq handshake in HPS
by Tien Fong Chee
· Wed Apr 27 12:27:21 2022 +0800
277f1f4
intel: n5x: ddr: update license
by Tien Fong Chee
· Fri Jun 10 19:18:00 2022 +0800
f8f6b32
Convert CONFIG_SPL_COMMON_INIT_DDR to Kconfig
by Tom Rini
· Sat May 21 14:44:28 2022 -0400
d8a5044
imx8m: fix reading of DDR4 MR registers
by Rasmus Villemoes
· Mon Apr 25 16:22:48 2022 +0200
654ec60
ddr: fsl: Allow to compile it without env support
by Pali Rohár
· Sun Apr 03 00:24:26 2022 +0200
ea0209f
imx8m: ddrphy_utils: Add 3732 MT/s mode
by Marek Vasut
· Sat Feb 26 04:37:42 2022 +0100
3210bdc
Convert CONFIG_DIMM_SLOTS_PER_CTLR to Kconfig
by Tom Rini
· Wed Mar 30 18:07:31 2022 -0400
9ae65bd
db-mv784mp-gp: Rename CONFIG_DB_784MP_GP to CONFIG_TARGET_DB_MV784MP_GP
by Tom Rini
· Thu Mar 24 17:17:56 2022 -0400
5618460
Convert CONFIG_CHIP_SELECTS_PER_CTRL to Kconfig
by Tom Rini
· Fri Feb 25 11:19:53 2022 -0500
532b719
ddr: marvell: a38x: fix BYTE_HOMOGENEOUS_SPLIT_OUT decision
by Marek Behún
· Thu Feb 17 01:08:37 2022 +0100
7f5dd94
imx8ulp: ddr: Fix DDR frequency request issue
by Ye Li
· Fri Oct 29 09:46:34 2021 +0800
9cac6e2
imx8ulp:ddr: saving the dram config timing data into sram
by Jacky Bai
· Fri Oct 29 09:46:33 2021 +0800
9e2a947
ddr: marvell: a38x: fix SPLIT_OUT_MIX state decision
by Marek Behún
· Wed Jan 12 17:06:59 2022 +0100
90e519e
ddr: marvell: a38x: Fix Synchronous vs Asynchronous mode determination
by Marek Behún
· Tue Jan 04 15:57:49 2022 +0100
a321d04
drivers/ddr/altera/sequencer.c: Fix spelling of "resetting".
by Vagrant Cascadian
· Tue Dec 21 13:07:01 2021 -0800
11c6693
arm: mvebu: axp: ddr: Switch to using DM I2C API
by Stefan Roese
· Thu Nov 18 09:19:38 2021 +0100
6f3dc96
arm: mvebu: axp: Remove unreferenced ddr3_get_eprom_fabric() function
by Stefan Roese
· Thu Nov 18 09:19:37 2021 +0100
f7eed20
Convert CONFIG_SYS_BR0_PRELIM et al to Kconfig
by Tom Rini
· Sat Nov 13 18:10:40 2021 -0500
e8fee9a
drivers: ddr: lc_common_dimm_params.c : Fix Divison by zero issue
by Maninder Singh
· Sun Oct 10 09:12:16 2021 -0700
aa44eb2
drivers: ddr: main.c: Fix Bad Shift operator issue
by Priyanka Singh
· Thu Aug 19 11:39:03 2021 +0530
d94a038
drivers: ddr: fsl_ddr_gen4.c: Fix divide by zero issue
by Priyanka Singh
· Thu Aug 19 11:39:02 2021 +0530
bc4ef9c
drivers: ddr: util.c: Fix divide by zero issue
by Priyanka Singh
· Thu Aug 19 11:39:01 2021 +0530
62fb2b4
WS cleanup: remove SPACE(s) followed by TAB
by Wolfgang Denk
· Mon Sep 27 17:42:39 2021 +0200
3fd6633
WS cleanup: remove trailing empty lines
by Wolfgang Denk
· Mon Sep 27 17:42:36 2021 +0200
961578e
Merge tag 'v2021.10-rc5' into next
by Tom Rini
· Mon Sep 27 09:45:36 2021 -0400
ed6c1ab
ddr: altera: use KBUILD_BASENAME instead of __FILE__
by Marek Vasut
· Tue Sep 14 05:20:19 2021 +0200
468c2d5
nxp: Migrate a number of DDR related symbols to Kconfig
by Tom Rini
· Sat Aug 21 13:50:18 2021 -0400
f7246c2
nxp: Migrate CONFIG_DDR_CLK_FREQ to Kconfig
by Tom Rini
· Sat Aug 21 13:50:17 2021 -0400
fe2cea6
ddr: Migrate DDR_SPD to Kconfig
by Tom Rini
· Sat Aug 21 13:50:16 2021 -0400
592bcd0
mvebe: Migrate CONFIG_DDR_LOG_LEVEL to Kconfig
by Tom Rini
· Sat Aug 21 13:50:15 2021 -0400
5155665
mvebu: ddr: Rename CONFIG_DDR_FIXED_SIZE to CONFIG_SYS_SDRAM_SIZE
by Tom Rini
· Sat Aug 21 13:50:14 2021 -0400
f8e2eab
ddr: altera: Add SDRAM driver for Intel N5X device
by Tien Fong Chee
· Tue Aug 10 11:26:37 2021 +0800
a513238
ddr: socfpga: Enable memory test on memory size less than 1GB
by Tien Fong Chee
· Tue Aug 10 11:26:36 2021 +0800
56499f6
ddr: Add DDR driver for iMX8ULP
by Ye Li
· Sat Aug 07 16:01:11 2021 +0800
a7ffa3d
ppc: Remove T4160RDB board
by Tom Rini
· Sun May 23 10:58:05 2021 -0400
e540498
ppc: Remove sbc8641d board
by Tom Rini
· Fri May 14 21:34:26 2021 -0400
e1ef708
ppc: Remove xpedite boards
by Tom Rini
· Fri May 14 21:34:25 2021 -0400
0b730a0
ppc: Remove MPC8555CDS boards
by Tom Rini
· Fri May 14 21:34:21 2021 -0400
7707c55
ppc: Remove MPC8541CDS board
by Tom Rini
· Fri May 14 21:34:20 2021 -0400
9655db9
ARM: mvebu: a38x: Correct mismatched bound warnings
by Tom Rini
· Mon May 03 16:48:53 2021 -0400
3090082
ppc: Remove Cyrus_P5020 and P5040 boards
by Tom Rini
· Sat Feb 20 20:06:30 2021 -0500
6292783
imx8mp: refine power on imx8mp board
by haidong.zheng
· Fri Mar 19 15:57:02 2021 +0800
9a365e3
arm: mvebu: a38x: Remove dead code ARMADA_39X
by Pali Rohár
· Fri Mar 05 15:52:42 2021 +0100
c61e5e4
ddr: marvell: axp: fix array types have different bounds warning
by Marek Behún
· Sun Mar 07 00:00:34 2021 +0100
8977d01
ddr: marvell: axp: align signature of mv_xor_mem_init() with a38x
by Marek Behún
· Thu Mar 04 11:23:14 2021 +0100
6d5e3fe
ddr: marvell: a38x: Sync code with Marvell mv-ddr-marvell repository
by Pali Rohár
· Tue Mar 02 11:17:41 2021 +0100
0d26759
ddr: marvell: a38x: Add more space for additional info from SPD
by Sujeet Baranwal
· Fri Feb 26 11:56:59 2021 +0100
8a71416
arm: socfpga: Move Stratix10 and Agilex to use TARGET_SOCFPGA_SOC64
by Siew Chin Lim
· Mon Mar 01 20:04:10 2021 +0800
efaf271
ddr: marvell: a38x: fix comment in conditional macro
by Marek Behún
· Fri Feb 19 17:11:26 2021 +0100
4235130
ddr: marvell: a38x: bump version to 14.0.0
by Marek Behún
· Fri Feb 19 17:11:25 2021 +0100
be975cd
ddr: marvell: a38x: enum mv_ddr_twin_die: change order
by heaterC
· Fri Feb 19 17:11:24 2021 +0100
b9eaf11
ddr: marvell: a38x: import code change from upstream
by Marek Behún
· Fri Feb 19 17:11:23 2021 +0100
2b368e1
ddr: marvell: a38x: fix memory cs size function
by Moti Buskila
· Fri Feb 19 17:11:22 2021 +0100
6965302
ddr: marvell: a38x: import header change from upstream
by Marek Behún
· Fri Feb 19 17:11:21 2021 +0100
e042270
ddr: marvell: a38x: disable WL phase correction stage in case of bus_width=16bit
by Moti Buskila
· Fri Feb 19 17:11:20 2021 +0100
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