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git01.mediatek.com / filogic / uboot / cf87371d89ccdb4e945a1ad5a515cd199b0f0e8a / drivers / clk
  1. e366a0c clk: sunxi: Add Allwinner A80 CLK driver by Jagan Teki · Fri Jan 11 15:41:46 2019 +0530
  2. 5bc16d2 clk: sunxi: Add Allwinner H6 CLK driver by Jagan Teki · Mon Dec 31 15:35:01 2018 +0530
  3. b490aa5 clk: sunxi: Implement UART resets by Jagan Teki · Sun Dec 30 21:37:31 2018 +0530
  4. 8cf08ea clk: sunxi: Implement UART clocks by Jagan Teki · Sun Dec 30 21:29:24 2018 +0530
  5. d69bf0b clk: sunxi: Add Allwinner V3S CLK driver by Jagan Teki · Sun Aug 05 14:31:54 2018 +0530
  6. 66c07fd clk: sunxi: Add Allwinner R40 CLK driver by Jagan Teki · Sun Aug 05 11:16:33 2018 +0530
  7. 2474033 clk: sunxi: Add Allwinner A83T CLK driver by Jagan Teki · Thu Aug 02 23:33:55 2018 +0530
  8. 885abd8 clk: sunxi: Add Allwinner A23/A33 CLK driver by Jagan Teki · Thu Aug 02 23:25:03 2018 +0530
  9. 438e8f6 clk: sunxi: Add Allwinner A31 CLK driver by Jagan Teki · Thu Aug 02 23:15:34 2018 +0530
  10. 0c16029 clk: sunxi: Add Allwinner A10s/A13 CLK driver by Jagan Teki · Thu Aug 02 19:54:26 2018 +0530
  11. b38f7af clk: sunxi: Add Allwinner A10/A20 CLK driver by Jagan Teki · Thu Aug 02 16:52:37 2018 +0530
  12. 2ee11ff clk: sunxi: Add Allwinner H3/H5 CLK driver by Jagan Teki · Thu Aug 02 15:43:02 2018 +0530
  13. 7f6c2a8 reset: Add Allwinner RESET driver by Jagan Teki · Fri Jan 18 22:18:13 2019 +0530
  14. 1d150b4 clk: Add Allwinner A64 CLK driver by Jagan Teki · Sat Dec 22 21:32:49 2018 +0530
  15. 0225945 clk: MediaTek: bind ethsys reset controller by developer · Thu Dec 20 16:12:52 2018 +0800
  16. 5659e33 clk: imx8: fix build warning by Peng Fan · Sat Dec 15 12:19:46 2018 +0000
  17. cdc6f65 clk: uniphier: add NAND 200MHz clock by Masahiro Yamada · Wed Dec 19 20:03:20 2018 +0900
  18. 3247081 clk: stm32: add hardware spinlock clock by Benjamin Gaignard · Tue Nov 27 13:49:51 2018 +0100
  19. e546ec8 clk: Allow clock defaults to be set during re-reloc state for SPL only by Philipp Tomsich · Mon Nov 26 20:20:19 2018 +0100
  20. 7b56617 Merge branch 'master' of git://git.denx.de/u-boot-sh by Tom Rini · Mon Dec 03 17:51:45 2018 -0500
  21. c037903 ARM: meson: Add regmap support for clock driver by Loic Devulder · Tue Nov 27 17:41:18 2018 +0100
  22. c26bf89 clk: renesas: Allow reconfiguring SDHI clock on Gen3 by Marek Vasut · Tue Oct 30 17:54:20 2018 +0100
  23. 25c7ba9 rockchip: rk3399: Initialize CPU B clock. by Christoph Muellner · Fri Nov 30 20:32:48 2018 +0100
  24. 3afae5e ARM: rockchip: rv1108: Sync clock with vendor tree by Otavio Salvador · Fri Nov 30 11:34:12 2018 -0200
  25. c9e7ac8 Merge tag 'u-boot-amlogic-20181126' of git://git.denx.de/u-boot-amlogic by Tom Rini · Thu Nov 29 09:33:33 2018 -0500
  26. d1b1ffa clk: MediaTek: add clock driver for MT7623 SoC. by developer · Thu Nov 15 10:07:55 2018 +0800
  27. 2186c98 clk: MediaTek: add clock driver for MT7629 SoC. by developer · Thu Nov 15 10:07:54 2018 +0800
  28. 5e6db8c clk: Add clock driver for AXG by Neil Armstrong · Fri Sep 07 17:25:13 2018 +0200
  29. f897c4b ARM: meson: rework soc arch file to prepare for new SoC by Jerome Brunet · Fri Oct 05 17:00:37 2018 +0200
  30. 0af4233 clk: meson: silence debug print by Jerome Brunet · Fri Oct 26 15:42:50 2018 +0200
  31. cd97793 clk: meson: add static to meson_gates table by Neil Armstrong · Thu Nov 08 17:17:41 2018 +0100
  32. 587dc40 misc: Update read() and write() methods to return bytes xfered by Simon Glass · Tue Nov 06 15:21:39 2018 -0700
  33. 0107c61 clk: meson: fix clk81 divider calculation by Jerome Brunet · Tue Nov 13 11:38:38 2018 +0100
  34. 89d1b08 clk: Allow clock defaults to be set also during re-reloc state by Andreas Dannenberg · Wed Oct 17 13:43:14 2018 +0530
  35. c826a09 clk: Remove DM_FLAG_PRE_RELOC flag in various drivers by Bin Meng · Wed Oct 24 06:36:29 2018 -0700
  36. d7f3789 aspeed: ast2500: fix D2-PLL clock setting in RGMII mode by Cédric Le Goater · Mon Oct 29 07:06:41 2018 +0100
  37. 62b4bfd aspeed: ast2500: fix missing break in D2PLL clock enablement by Cédric Le Goater · Mon Oct 29 07:06:37 2018 +0100
  38. d6e53c7 drivers: cosmetic: Convert SPDX license tags to Linux Kernel style by Patrick Delaunay · Fri Oct 26 09:02:52 2018 +0200
  39. 5e80d5a clk: imx: add clk driver for i.MX8QXP by Peng Fan · Thu Oct 18 14:28:30 2018 +0200
  40. ba024e6 clk: Add support for Arm's Versatile Express OSC clock generators by Liviu Dudau · Mon Sep 17 17:50:00 2018 +0100
  41. 2dc9eba Merge git://git.denx.de/u-boot-marvell by Tom Rini · Wed Sep 19 20:35:05 2018 -0400
  42. 7bafd04 clk: armada-37xx-periph: Support changing clock parent and rate by Marek Behún · Fri Aug 17 12:58:52 2018 +0200
  43. 7cab147 clk: Add MPC83xx clock driver by Mario Six · Mon Aug 06 10:23:36 2018 +0200
  44. 1530e35 clk: Introduce TI System Control Interface (TI SCI) clock driver by Andreas Dannenberg · Mon Aug 27 15:57:43 2018 +0530
  45. 07f2477 clk: clk_meson: Add mux and div support for reparent and rate setting by Neil Armstrong · Mon Aug 06 14:49:20 2018 +0200
  46. 1586fbd Merge branch 'master' of git://git.denx.de/u-boot-sunxi by Tom Rini · Mon Aug 20 13:41:56 2018 -0400
  47. 536a61c Merge branch 'master' of git://git.denx.de/u-boot-socfpga by Tom Rini · Fri Aug 17 07:24:34 2018 -0400
  48. 3f9d735 clk: socfpga: Add initial Arria10 clock driver by Marek Vasut · Tue Jul 31 17:58:07 2018 +0200
  49. 7f9e879 clk: at91: utmi: add timeout for utmi lock by Eugen Hristev · Fri Aug 03 12:10:49 2018 +0300
  50. 9d2787c clk: Kconfig: Ascending order to sub directiory kconfigs by Jagan Teki · Mon Jul 30 18:26:18 2018 +0530
  51. f3cc631 clk: clk_set_default: accept no-op skip fields by Neil Armstrong · Thu Jul 26 15:19:32 2018 +0200
  52. 1119271 clk: add clk_valid() by Fabrice Gasnier · Tue Jul 24 16:31:28 2018 +0200
  53. 80cb568 stm32mp1: clk: support digital bypass by Patrick Delaunay · Mon Jul 16 10:41:46 2018 +0200
  54. 201f0d5 stm32mp1: clk: add ADC clock gating by Patrick Delaunay · Mon Jul 16 10:41:45 2018 +0200
  55. effe2b4 stm32mp1: clk: update Ethernet clock gating by Patrick Delaunay · Mon Jul 16 10:41:44 2018 +0200
  56. 8314d2c stm32mp1: clk: add LDTC and DSI clock support by Patrick Delaunay · Mon Jul 16 10:41:43 2018 +0200
  57. 5327d37 stm32mp1: clk: add common function pll_get_fvco by Patrick Delaunay · Mon Jul 16 10:41:42 2018 +0200
  58. a7c0fd6 stm32mp1: clk: define RCC_PLLNCFGR2_SHIFT macro by Patrick Delaunay · Mon Jul 16 10:41:41 2018 +0200
  59. b139a5b misc: stm32: Add STM32MP1 support by Patrick Delaunay · Mon Jul 09 15:17:20 2018 +0200
  60. 488f0e7 clk: zynqmp: Fixed the same if/else part error reported by coverity by Vipul Kumar · Wed Jun 27 10:44:45 2018 +0530
  61. 91a8513 clk: Add Actions Semi OWL clock support by Manivannan Sadhasivam · Thu Jun 14 23:38:35 2018 +0530
  62. b67bfaf clk: add Amlogic meson clock driver by Beniamino Galvani · Thu Jun 14 13:43:39 2018 +0200
  63. 2447b74 clk: rmobile: Add R8A77995 RPC clock by Marek Vasut · Thu Jun 14 05:26:31 2018 +0200
  64. 69be062 clk: rmobile: Add R8A77990 RPC clock by Marek Vasut · Wed Jun 13 21:25:24 2018 +0200
  65. 2467224 Merge branch 'master' of git://git.denx.de/u-boot-sh by Tom Rini · Fri Jun 01 21:10:18 2018 -0400
  66. df3bf64 clk: bcm6345: convert to use live dt by Álvaro Fernández Rojas · Thu Mar 22 19:39:30 2018 +0100
  67. a6b456d clk: renesas: Add R8A77990 E3 clock tables by Marek Vasut · Thu Apr 26 10:19:03 2018 +0200
  68. 69459b2 clk: renesas: Add PE clock handling by Marek Vasut · Thu May 31 19:47:42 2018 +0200
  69. 52389f0 clk: renesas: Add PLL1 and PLL3 dividers by Marek Vasut · Thu May 31 19:25:41 2018 +0200
  70. 7571ac4 clk: renesas: Pass clock rate around as 64bit number internally by Marek Vasut · Thu May 31 19:06:02 2018 +0200
  71. 31de3d8 clk: renesas: Fix swapped arguments in debug message by Marek Vasut · Thu May 31 18:56:35 2018 +0200
  72. 217f8fc clk: at91: clk-h32mx: replace dm_warn with dev_dbg by Eugen Hristev · Wed May 09 10:58:30 2018 +0300
  73. d2d191d rockchip: clk: rk3288: handle clk_enable requests for GMAC by Jonathan Gray · Tue May 08 19:49:05 2018 +1000
  74. d8e6942 clk: armada-37xx: Support soc_clk_dump by Marek Behún · Tue Apr 24 17:21:27 2018 +0200
  75. 61d74e8 driver: clk: Add support for clocks on Armada 37xx by Marek Behún · Tue Apr 24 17:21:25 2018 +0200
  76. a3c0706 clk: Add ICS8N3QV01 driver by Mario Six · Fri Apr 27 14:53:15 2018 +0200
  77. 4cb3b53 clk: stm32mp1: Add VREF clock gating by Fabrice Gasnier · Thu Apr 26 17:00:47 2018 +0200
  78. 7264aae clk: clk_stm32f: Use PLLSAIP as USB 48MHz clock by Patrice Chotard · Wed Apr 11 17:07:45 2018 +0200
  79. 8b0c8a1 SPDX: Convert all of our multiple license tags to Linux Kernel style by Tom Rini · Sun May 06 18:27:01 2018 -0400
  80. 10e4779 SPDX: Convert all of our single license tags to Linux Kernel style by Tom Rini · Sun May 06 17:58:06 2018 -0400
  81. 031f404 clk: renesas: Drop USB extal from the R8A7792 clock driver by Marek Vasut · Wed May 02 10:48:15 2018 +0200
  82. bdfb5c4 Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR by Tom Rini · Wed Apr 18 13:50:47 2018 -0400
  83. 216cccb rockchip: rv1108: add ofdata_to_platdata() method for driver by Kever Yang · Tue Apr 24 11:27:08 2018 +0800
  84. 481cbed rockchip: rk3128: add ofdata_to_platdata() method for driver by Kever Yang · Tue Apr 24 11:27:07 2018 +0800
  85. 1e05ff1 rockchip: rk3036: add ofdata_to_platdata() method for driver by Kever Yang · Tue Apr 24 11:27:06 2018 +0800
  86. 83d71f9 rockchip: clk: rk3288: add clk_enable function and support USB HOST0/HSIC by Wadim Egorov · Mon Mar 19 16:39:29 2018 +0100
  87. 033d080 clk: uniphier: disable SPL_CLK by Masahiro Yamada · Fri Apr 20 18:14:27 2018 +0900
  88. dada109 clk: renesas: Minor clean up of the R8A7794 clock driver by Marek Vasut · Sat Apr 21 16:35:49 2018 +0200
  89. f5ff753 clk: renesas: Minor clean up of the R8A7792 clock driver by Marek Vasut · Sat Apr 21 16:36:54 2018 +0200
  90. 992e12a Merge git://git.denx.de/u-boot-uniphier by Tom Rini · Wed Apr 18 16:24:26 2018 -0400
  91. cb2f1d9 clk: uniphier: add ethernet clock control support by Kunihiko Hayashi · Wed Apr 18 10:05:33 2018 +0900
  92. 52b26d9 clk: fix clk_get_bulk when phandle error by Neil Armstrong · Tue Apr 17 11:30:31 2018 +0200
  93. f40c4cf clk: renesas: Minor clean up of the R8A7790 clock driver by Marek Vasut · Thu Apr 12 15:23:46 2018 +0200
  94. 567a38b clk: add sandbox test for bulk API by Neil Armstrong · Tue Apr 03 11:44:19 2018 +0200
  95. 8a275a0 clk: Add get/enable/disable/release for a bulk of clocks by Neil Armstrong · Tue Apr 03 11:44:18 2018 +0200
  96. d260ac7 clk: zynqmp: Add new compatible string for clock driver by Michal Simek · Wed Feb 21 13:59:21 2018 +0100
  97. bf7d944 clock: stm32mp1: add stgen clock source change support by Patrick Delaunay · Tue Mar 20 11:41:25 2018 +0100
  98. 67df61f rockchip: clk: rk3188: update dpll settings to make EMAC work by Alexander Kochetkov · Mon Feb 26 14:27:38 2018 +0300
  99. c35e5f6 arm64: zynqmp: Print the value of pl clocks and wdt clock using clk dump by Vipul Kumar · Wed Mar 07 14:52:44 2018 +0530
  100. 324212d clk: zynq: Show watchdog clock rate properly by Michal Simek · Wed Feb 21 15:06:20 2018 +0100