Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / ccb293f30d203eb43797238b6dfe6d2eccdf66ef / arch / arm / include / asm / system.h
  1. 61488c1 ARM: Introduce function to switch to hypervisor mode by Keerthy · Wed Sep 14 10:43:32 2016 +0530
  2. 3b787ef ARM: Rework and correct barrier definitions by Tom Rini · Mon Aug 01 18:54:53 2016 -0400
  3. b8845e1 arm: implement generic PSCI reset call for armv8 by Beniamino Galvani · Sun May 08 08:30:14 2016 +0200
  4. ae6c2bc arm: Add support for HYP mode and LPAE page tables by Alexander Graf · Wed Mar 16 15:41:21 2016 +0100
  5. 188c8ff arm64: Add 32bit arm compatible dcache definitions by Alexander Graf · Wed Mar 16 15:41:20 2016 +0100
  6. ce0a64e arm64: Remove non-full-va map code by Alexander Graf · Fri Mar 04 01:09:54 2016 +0100
  7. e317fe8 arm64: Make full va map code more dynamic by Alexander Graf · Fri Mar 04 01:09:47 2016 +0100
  8. d6e436e arm: Remove S bit from MMU section entry by Marek Vasut · Tue Dec 29 19:44:02 2015 +0100
  9. fbf49c0 arm: Replace test for CONFIG_ARMV7 with CONFIG_CPU_V7 by Marek Vasut · Tue Dec 29 19:44:01 2015 +0100
  10. 064949c armv8: Add Secure Monitor/Hypervisor Call (SMC/HVC) infrastructure by Sergey Temerkhanov · Wed Oct 14 09:55:46 2015 -0700
  11. 78eaa49 armv8: New MMU setup code allowing to use 48+ bits PA/VA by Sergey Temerkhanov · Wed Oct 14 09:55:45 2015 -0700
  12. 6774e4e armv8: Add read_mpidr() function by Sergey Temerkhanov · Wed Oct 14 09:55:44 2015 -0700
  13. fbdcd22 armv8: enable compilation with CONFIG_SYS_NONCACHED_MEMORY by Stephen Warren · Mon Oct 05 12:08:59 2015 -0600
  14. d89b72c arm: mmu: Add missing volatile for reading SCTLR register by Alison Wang · Wed Sep 09 10:22:02 2015 +0800
  15. ba2432a armv8: caches: Added routine to set non cacheable region by Siva Durga Prasad Paladugu · Fri Jun 26 18:05:07 2015 +0530
  16. 32db57d arm: Add a prototype for save_boot_params_ret() by Simon Glass · Mon May 04 11:31:03 2015 -0600
  17. d07e7b0 tegra124: Reserve secure RAM using MC_SECURITY_CFG{0, 1}_0 by Ian Campbell · Tue Apr 21 07:18:36 2015 +0200
  18. 29d23ec ARMv7 TLB: Fixed TTBR0 and Table Descriptors to allow caching by Bryan Brinsko · Tue Mar 24 11:25:12 2015 -0500
  19. 1ce575f armv8/fsl-lsch3: Convert flushing L3 to assembly to avoid using stack by York Sun · Tue Jan 06 13:18:42 2015 -0800
  20. 47197fe arm: Allow lr to be saved by board code by Simon Glass · Sat Feb 07 10:47:28 2015 -0700
  21. c97d974 ARM: Implement non-cached memory support by Thierry Reding · Tue Dec 09 22:25:22 2014 -0700
  22. fe200715 ARM: cache-cp15: Use more accurate types by Thierry Reding · Tue Aug 26 17:34:21 2014 +0200
  23. 79b9072 arm: cache: Add support for write-allocate D-Cache by Marek Vasut · Mon Sep 15 02:44:36 2014 +0200
  24. a84cd72 ARMv8/FSL_LSCH3: Add FSL_LSCH3 SoC by York Sun · Mon Jun 23 15:15:54 2014 -0700
  25. ef04201 armv8/cache: Change cache invalidate and flush function by York Sun · Wed Feb 26 13:26:04 2014 -0800
  26. 85fd5f1 arm64: core support by David Feng · Sat Dec 14 11:47:35 2013 +0800
  27. 06396c1 ARM: mmu: Set domain permissions to client access by R Sricharan · Mon Mar 04 20:04:45 2013 +0000
  28. aa47030 ARM: add wfi assembly macro by Rob Herring · Sun Dec 02 17:06:21 2012 +0000
  29. a4f2079 arm: Add control over cachability of memory regions by Simon Glass · Wed Oct 17 13:24:53 2012 +0000
  30. 3cba3c1 Move architecture-specific includes to arch/$ARCH/include/asm by Peter Tyser · Mon Apr 12 22:28:08 2010 -0500[Renamed from include/asm-arm/system.h]
  31. 9053b5a arm: update co-processor 15 access by Jean-Christophe PLAGNIOL-VILLARD · Sun Apr 05 13:02:43 2009 +0200