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git01.mediatek.com / filogic / uboot / c8481ef6226e348fcb52d60616b117577d5044f3 / arch / riscv
  1. c8481ef dts: automatically build necessary .dtb files by Rasmus Villemoes · Mon Jan 10 14:34:41 2022 +0100
  2. 47b4c02 doc: replace @return by Return: by Heinrich Schuchardt · Wed Jan 19 18:05:50 2022 +0100
  3. f263479 efi_loader: fix SectionAlignment, FileAlignment by Heinrich Schuchardt · Fri Jan 14 21:40:15 2022 +0100
  4. f0106d4 riscv: revert Complete efi header for RV32/64 by Heinrich Schuchardt · Sun Jan 09 18:16:11 2022 +0100
  5. bd07fb4 riscv: qemu: Split devicetree files for qemu_riscv32/64 by Simon Glass · Thu Dec 16 20:59:12 2021 -0700
  6. 9b9c4d5 riscv: Enable SPI flash env for SiFive Unmatched. by Thomas Skibo · Wed Nov 24 14:32:10 2021 -0800
  7. f50fad6 riscv: Support booting SiFive Unmatched from SPI. by Thomas Skibo · Wed Nov 24 14:32:09 2021 -0800
  8. b56e2fd riscv: dts: Split Microchip device tree by Padmarao Begari · Wed Nov 17 18:21:17 2021 +0530
  9. 2f5b807 riscv: add #define in asm/io.h for some device drivers by Wei Fu · Sun Oct 24 00:31:12 2021 +0800
  10. 69c681e riscv: function to retrieve SBI implementation version by Heinrich Schuchardt · Mon Oct 25 15:09:34 2021 +0200
  11. 579f12b riscv: Avoid io read/write cause wrong result by Nick Hu · Mon Oct 18 11:50:05 2021 +0800
  12. dc35df4 riscv: Remove OF_PRIOR_STAGE from RISC-V boards by Ilias Apalodimas · Tue Oct 12 00:00:13 2021 +0300
  13. bedc439 fdtdec: Support reserved-memory flags by Thierry Reding · Fri Sep 03 15:16:21 2021 +0200
  14. 5e33691 fdtdec: Support compatible string list for reserved memory by Thierry Reding · Fri Sep 03 15:16:19 2021 +0200
  15. 85c057e image: Drop IMAGE_ENABLE_OF_LIBFDT by Simon Glass · Sat Sep 25 19:43:21 2021 -0600
  16. 2795bf2 riscv: ae350: enable Coherence Manager for ae350 by Leo Yu-Chi Liang · Thu Sep 23 10:34:29 2021 +0800
  17. cc382ff sysreset: provide SBI based sysreset driver by Heinrich Schuchardt · Sun Sep 12 21:11:46 2021 +0200
  18. 2d1c651 riscv: add missing SBI extension definitions by Heinrich Schuchardt · Sun Sep 12 21:11:44 2021 +0200
  19. c7ad952 riscv: Fix setting no-map in reserved memory nodes by Samuel Holland · Sun Sep 12 11:05:47 2021 -0500
  20. 637fa28 lmb: riscv: Add arch_lmb_reserve() by Marek Vasut · Fri Sep 10 22:47:15 2021 +0200
  21. 17a2907 Merge tag 'v2021.10-rc4' into next by Tom Rini · Thu Sep 16 10:29:40 2021 -0400
  22. b28d6b9 riscv: lib: modify the indent by Zong Li · Wed Sep 01 15:01:43 2021 +0800
  23. ec34849 board: sifive: use ccache driver instead of helper function by Zong Li · Wed Sep 01 15:01:42 2021 +0800
  24. c39544c riscv: lib: implement enable_caches for sifive cache by Zong Li · Wed Sep 01 15:01:41 2021 +0800
  25. a33070c common: board_r: support enable_caches for RISC-V by Zong Li · Wed Sep 01 15:01:40 2021 +0800
  26. 79c6855 riscv: show code leading to exception by Heinrich Schuchardt · Sat Sep 04 10:36:49 2021 +0200
  27. 4b198e3 Kconfig: Remove all default n/no options by Michal Simek · Fri Aug 27 08:48:10 2021 +0200
  28. 3ef67ae Finish converting CONFIG_SYS_CACHELINE_SIZE to Kconfig by Tom Rini · Thu Aug 26 11:47:59 2021 -0400
  29. f1ac8fa riscv: cpu: fu740: Fix typo of date by Zong Li · Mon Aug 02 15:34:14 2021 +0800
  30. 5629aaa efi_loader: add Linux magic to RISC-V crt0 by Heinrich Schuchardt · Fri May 28 22:24:37 2021 +0200
  31. bccfc2e i2c: Rename SPL/TPL_I2C_SUPPORT to I2C by Simon Glass · Sat Jul 10 21:14:36 2021 -0600
  32. 288ad1f board: sifive: drop stuff related to unmatched revision 1 by Zong Li · Tue Jul 20 14:26:08 2021 +0800
  33. 51744fe riscv: booti: do not force relocation if force_reloc is not set by Vitaly Wool · Tue Apr 06 10:50:16 2021 +0300
  34. babf1cb riscv: dts: add OpenPiton RISC-V board dts support by Tianrui Wei · Wed Jul 07 15:48:22 2021 +0800
  35. bab770a riscv: dts: add dts for unmatched rev1 by Zong Li · Wed Jun 30 23:23:49 2021 +0800
  36. dab3e8e board: sifive: Add an interface to get PCB revision by Zong Li · Wed Jun 30 23:23:48 2021 +0800
  37. 9627a8e riscv: sifive: fu740: Support i2c in spl by Zong Li · Wed Jun 30 23:23:47 2021 +0800
  38. 3376055 riscv: sifive: fu740: kconfig: Enable support for Opencores I2C controller by Zong Li · Wed Jun 30 23:23:46 2021 +0800
  39. 2ef594d board: riscv: add openpiton-riscv64 SoC support by Tianrui Wei · Thu Jul 01 12:54:19 2021 +0800
  40. d3e8b73 Merge tag 'v2021.07-rc5' into next by Tom Rini · Mon Jun 28 16:22:13 2021 -0400
  41. e6638b4 k210: dts: Set PLL1 to the same rate as PLL0 by Sean Anderson · Fri Jun 11 00:16:15 2021 -0400
  42. b6ec26b riscv: andes_plic: Fix riscv_get_ipi() mask by Bin Meng · Tue Jun 15 13:45:57 2021 +0800
  43. 2114b47 riscv: ae350: dts: Add missing "u-boot, dm-spl" for SPL config by Bin Meng · Fri Jun 04 13:51:13 2021 +0800
  44. 85741a2 riscv: ae350: dts: Fix #interrupt-cells for plic0 in 32-bit by Bin Meng · Fri Jun 04 13:51:12 2021 +0800
  45. cd00421 riscv: ae350: dts: Remove the unnecessary #address-cells in plic nodes by Bin Meng · Fri Jun 04 13:51:11 2021 +0800
  46. 996068b riscv: ae350: dts: Remove the unnecessary space in bootargs by Bin Meng · Fri Jun 04 13:51:10 2021 +0800
  47. c907594 riscv: ae350: dts: Add SPDX license header by Bin Meng · Fri Jun 04 13:51:09 2021 +0800
  48. 26190b8 riscv: cpu: fu740: clear feature disable CSR by Green Wan · Thu May 27 06:52:14 2021 -0700
  49. 2e5da52 board: sifive: add HiFive Unmatched board support by Green Wan · Thu May 27 06:52:13 2021 -0700
  50. e552af3 riscv: dts: add SiFive Unmatched board support by Green Wan · Thu May 27 06:52:12 2021 -0700
  51. 06a3e40 riscv: dts: add fu740 support by Green Wan · Thu May 27 06:52:11 2021 -0700
  52. ecefa5f drivers: clk: add fu740 support by Green Wan · Thu May 27 06:52:08 2021 -0700
  53. 7f33743 riscv: cpu: fu740: Add support for cpu fu740 by Green Wan · Thu May 27 06:52:07 2021 -0700
  54. 4bebdd3 treewide: Convert macro and uses of __section(foo) to __section("foo") by Marek Behún · Thu May 20 13:23:52 2021 +0200
  55. 442d446 riscv: Drop USE_SPL_FIT_GENERATOR by Bin Meng · Mon May 10 20:23:41 2021 +0800
  56. 6b977a4 riscv: ae350: Switch to use binman to generate u-boot.itb by Bin Meng · Mon May 10 20:23:40 2021 +0800
  57. 1255ab8 riscv: qemu: Switch to use binman to generate u-boot.itb by Bin Meng · Mon May 10 20:23:39 2021 +0800
  58. eada910 riscv: dts: Sort build targets in alphabetical order by Bin Meng · Mon May 10 20:23:38 2021 +0800
  59. ced2097 riscv: sifive: unleashed: Switch to use binman to generate u-boot.itb by Bin Meng · Mon May 10 20:23:35 2021 +0800
  60. ce64bd3 riscv: Group assembly optimized implementation of memory routines into a submenu by Bin Meng · Thu May 13 16:46:18 2021 +0800
  61. 8a27fcd riscv: Fix memmove and optimise memcpy when misalign by Bin Meng · Thu May 13 16:46:17 2021 +0800
  62. ac95f46 riscv: Fix arch_fixup_fdt always failing without /chosen by Sean Anderson · Fri May 14 22:36:16 2021 -0400
  63. 614b1d8 riscv: Split SiFive CLINT support between SPL and U-Boot proper by Bin Meng · Tue May 11 20:04:12 2021 +0800
  64. b1b3bc0 Revert "riscv: cpu: fu740: clear feature disable CSR" by Bin Meng · Mon May 10 17:08:16 2021 +0800
  65. 72422b9 riscv: Don't reserve AI ram in k210 dts by Sean Anderson · Thu Apr 08 22:13:13 2021 -0400
  66. b23d757 riscv: k210: Use AI as the parent clock of aisram, not PLL1 by Sean Anderson · Thu Apr 08 22:13:12 2021 -0400
  67. 7be6d2b riscv: k210: Rename airam to aisram by Sean Anderson · Thu Apr 08 22:13:11 2021 -0400
  68. e8d9e3a riscv: Enable some devices pre-relocation by Sean Anderson · Thu Apr 08 22:13:09 2021 -0400
  69. 968a13f riscv: cpu: fu740: clear feature disable CSR by Green Wan · Sun May 02 23:23:05 2021 -0700
  70. 2612080 riscv: cpu: Add callback to init each core by Green Wan · Sun May 02 23:23:04 2021 -0700
  71. d62063d lmb: move CONFIG_LMB in Kconfig by Patrick Delaunay · Wed Mar 10 10:16:25 2021 +0100
  72. 369d87a Add support for stack-protector by Joel Peshkin · Sun Apr 11 11:21:58 2021 +0200
  73. c88bdaa riscv: dts: mpfs-icicle-kit: Drop 'clock-frequency' in the uart nodes by Bin Meng · Wed Mar 31 15:24:50 2021 +0800
  74. 23caf66 riscv: assembler versions of memcpy, memmove, memset by Heinrich Schuchardt · Sat Mar 27 12:37:04 2021 +0100
  75. 76eb648 riscv: simplify longjmp by Heinrich Schuchardt · Tue Mar 23 19:11:26 2021 +0100
  76. e9ead4a riscv: sifive: Rename fu540 board to unleashed by Bin Meng · Wed Mar 17 11:10:58 2021 +0800
  77. 1c30c0e riscv: Add watchdog bindings for the k210 by Sean Anderson · Wed Mar 10 21:02:21 2021 -0500
  78. 2f00216 cpu: Rename SPL_CPU_SUPPORT to SPL_CPU by Simon Glass · Mon Mar 15 18:11:18 2021 +1300
  79. 0937c19 riscv: k210: Enable QSPI for spi3 by Sean Anderson · Thu Feb 04 23:11:19 2021 -0500
  80. b1db71b Merge branch '2021-02-02-drop-asm_global_data-when-unused' by Tom Rini · Mon Feb 15 08:19:40 2021 -0500
  81. 440b77f riscv: Change phys_addr_t and phys_size_t to 64-bit by Bin Meng · Sun Jan 31 20:36:04 2021 +0800
  82. 489b25a riscv: Adjust board_get_usable_ram_top() for 32-bit by Bin Meng · Sun Jan 31 20:35:57 2021 +0800
  83. 3ba929a common: Drop asm/global_data.h from common header by Simon Glass · Fri Oct 30 21:38:53 2020 -0600
  84. 5854c3d riscv: dts: Add device tree for Microchip Icicle Kit by Padmarao Begari · Fri Jan 15 08:20:39 2021 +0530
  85. a235d43 riscv: Add DMA 64-bit address support by Padmarao Begari · Fri Jan 15 08:20:35 2021 +0530
  86. bb721de Merge tag 'dm-pull-5jan21' of git://git.denx.de/u-boot-dm into next by Tom Rini · Tue Jan 05 22:34:43 2021 -0500
  87. e6256ce Merge tag 'v2021.01-rc5' into next by Tom Rini · Tue Jan 05 16:20:26 2021 -0500
  88. 65130cd dm: Rename DM_GET_DRIVER() to DM_DRIVER_GET() by Simon Glass · Mon Dec 28 20:34:56 2020 -0700
  89. 2ddd3e0 riscv: Add device tree bindings for SPI by Sean Anderson · Fri Oct 16 18:57:54 2020 -0400
  90. fd9571a spi: dw: Add SoC-specific compatible strings by Sean Anderson · Fri Oct 16 18:57:50 2020 -0400
  91. dd5d79b riscv: Complete efi header for RV32/64 by Leo Yu-Chi Liang · Mon Nov 16 17:07:41 2020 +0800
  92. b68402d riscv: Fix efi header size for RV32 by Leo Yu-Chi Liang · Thu Nov 12 10:09:52 2020 +0800
  93. fa36696 riscv: Fix efi header for RV32 by Atish Patra · Tue Oct 13 12:23:31 2020 -0700
  94. b881ba8 riscv: reset after crash by Heinrich Schuchardt · Wed Dec 02 14:36:26 2020 +0100
  95. 4b96c88 riscv: fix the wrong swap value register by Brad Kim · Fri Nov 13 20:47:51 2020 +0900
  96. b75b15b dm: treewide: Rename ..._platdata variables to just ..._plat by Simon Glass · Thu Dec 03 16:55:23 2020 -0700
  97. 4f1b444 riscv: sifive/fu540: kconfig: Enable support for Opencores I2C controller by Pragnesh Patel · Sat Nov 14 14:42:35 2020 +0530
  98. 2dc5984 riscv: fu540: dts: Correct reg size of clint node by Pragnesh Patel · Tue Oct 20 11:03:02 2020 +0530
  99. 52a1db7 riscv: Move timer portions of SiFive CLINT to drivers/timer by Sean Anderson · Sun Oct 25 21:46:58 2020 -0400
  100. 5a23865 timer: Add _TIMER suffix to Andes PLMT Kconfig by Sean Anderson · Sun Oct 25 21:46:57 2020 -0400