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git01.mediatek.com / filogic / uboot / c7a7ae58d47f969f6a8cfac80c88c10a780b3b38 / drivers / net / zynq_gem.c
  1. 168cf70 net: gem: Remove phy autodetection code by Michal Simek · Fri Mar 29 09:25:09 2019 +0100
  2. 1220350 net: zynq_gem: Modify phy supported features after max-speed was set by Siva Durga Prasad Paladugu · Wed Mar 27 17:39:59 2019 +0530
  3. 0f407c9 zynq-gem: Use appropriate cache flush/invalidate for RX and TX by Stefan Theil · Mon Dec 17 09:12:30 2018 +0100
  4. b7b3637 net: zynq_gem: Add check for 64-bit dma support by hardware by Siva Durga Prasad Paladugu · Mon Nov 26 16:27:39 2018 +0530
  5. cbc2ed6 net: zynq_gem: Added 64-bit addressing support by Vipul Kumar · Mon Nov 26 16:27:38 2018 +0530
  6. 2874b2a net: gem: Do not setup any clock for Xilinx SoC Versal by Michal Simek · Wed Aug 22 16:18:34 2018 +0200
  7. 8114538 net: zynq_gem: Add support for fixed-link phy by Michal Simek · Thu Sep 20 09:42:27 2018 +0200
  8. 9a6dc34 net: zynq_gem: Fix reading of max-speed property by Siva Durga Prasad Paladugu · Tue Sep 04 19:08:53 2018 +0530
  9. 34a48e5 net: zynq_gem: convert to use livetree by Siva Durga Prasad Paladugu · Mon Jul 16 18:25:45 2018 +0530
  10. b5bc296 drivers: net: zynq_gem: fix phy dt node setting by Grygorii Strashko · Thu Jul 05 12:02:52 2018 -0500
  11. d061bfd net: zynq_gem: Initialize val variable in zynq_gem_miiphy_read() by Michal Simek · Thu Jun 14 09:08:44 2018 +0200
  12. c8959f4 net: gem: Check return value from memalign/malloc by Michal Simek · Wed Jun 13 15:20:35 2018 +0200
  13. 952bdd3 net: zynq_gem: Initialize phyreg variable by Michal Simek · Wed Jun 13 10:33:49 2018 +0200
  14. 70551ca net: zynq_gem: Fix return type for phy...() by Michal Simek · Wed Jun 13 10:00:30 2018 +0200
  15. 10e4779 SPDX: Convert all of our single license tags to Linux Kernel style by Tom Rini · Sun May 06 17:58:06 2018 -0400
  16. 0703cc5 net: zynq_gem: Use max-speed property from dt by Siva Durga Prasad Paladugu · Thu Apr 12 12:22:17 2018 +0200
  17. 0dae065 net: zynq_gem: Dont run any phy detection logic for GMII case by Siva Durga Prasad Paladugu · Tue Feb 20 11:56:19 2018 +0530
  18. 918de03 wait_bit: use wait_for_bit_le32 and remove wait_for_bit by Álvaro Fernández Rojas · Tue Jan 23 17:14:55 2018 +0100
  19. 134cfa6 net: zynq_gem: Dont enable SGMII and PCS selection by Siva Durga Prasad Paladugu · Thu Nov 23 12:56:55 2017 +0530
  20. 8eefe0d net: zynq_gem: Dont flush dummy descriptors by Siva Durga Prasad Paladugu · Tue May 30 14:28:40 2017 +0200
  21. d6c7af0 net: zynq_gem: Use wait_for_bit with non breakable by Siva Durga Prasad Paladugu · Tue May 30 14:28:39 2017 +0200
  22. fee13c3 net: zynq_gem: Do not return -ENOSYS on success by Olliver Schinagl · Mon Apr 03 16:18:53 2017 +0200
  23. ba1dea4 dm: Rename dev_addr..() functions by Simon Glass · Wed May 17 17:18:05 2017 -0600
  24. ba11ac2 Merge tag 'xilinx-for-v2017.05' of git://www.denx.de/git/u-boot-microblaze by Tom Rini · Thu Mar 16 16:44:23 2017 -0400
  25. f429f56 net: zynq_gem: Fix masking of supported phydev features by Nathan Rossi · Mon Mar 06 00:36:23 2017 +1000
  26. e67c6c4 zynq: Move zynq to clock framework by Stefan Herbrechtsmeier · Tue Jan 17 16:27:30 2017 +0100
  27. bb43397 net: zynq: Add clk framework support to zynq ethernet driver by Stefan Herbrechtsmeier · Tue Jan 17 16:27:25 2017 +0100
  28. 3e47077 net: zynq: Don't overwrite gem_rclk_ctrl with default value by Stefan Herbrechtsmeier · Tue Jan 17 16:27:24 2017 +0100
  29. dd79d6e dm: core: Replace of_offset with accessor by Simon Glass · Tue Jan 17 16:52:55 2017 -0700
  30. baa2035 net: zynq_gem: Use clock driver for ZynqMP by Siva Durga Prasad Paladugu · Tue Nov 15 16:15:42 2016 +0530
  31. e670965 net: gem: Use wait_for_bit() instead of private mdio_wait() by Michal Simek · Mon Dec 12 09:47:26 2016 +0100
  32. e4dab43 net: xilinx: Use mdio_register_seq() to support multiple instances by Michal Simek · Thu Dec 08 10:25:44 2016 +0100
  33. edcfdbd Revert "Merge branch 'master' of git://www.denx.de/git/u-boot-microblaze" by Tom Rini · Fri Dec 09 07:56:54 2016 -0500
  34. 1e582b0 net: xilinx: Use mdio_register_seq() to support multiple instances by Michal Simek · Thu Dec 08 10:25:44 2016 +0100
  35. fca1e84 common: miiphyutil: Work and report phy address in hex in mdio cmd by Michal Simek · Wed Nov 16 08:41:01 2016 +0100
  36. f6c2d20 net: zynq_gem: Correct SGMII enable bit setting by Siva Durga Prasad Paladugu · Mon May 16 15:31:38 2016 +0530
  37. 7e7fcc3 net: zynq_gem: Modify the nwcfg bit definitions by Siva Durga Prasad Paladugu · Mon May 16 15:31:37 2016 +0530
  38. 64e4f7f treewide: replace #include <asm-generic/errno.h> with <linux/errno.h> by Masahiro Yamada · Wed Sep 21 11:28:57 2016 +0900
  39. 39452be Merge branch 'master' of git://git.denx.de/u-boot-net by Tom Rini · Tue May 24 11:59:02 2016 -0400
  40. a582871 net: zynq_gem: Add the passing of the phy-handle node by Dan Murphy · Mon May 02 15:45:57 2016 -0500
  41. 24ce232 phy: Wire return value from phy_config() by Michal Simek · Wed May 18 14:37:23 2016 +0200
  42. dbc0cfc net: xilinx: Handle error value from phy_startup() by Michal Simek · Wed May 18 12:37:22 2016 +0200
  43. 4546700 net: zynq_gem: Add SGMII support for zynqMP by Siva Durga Prasad Paladugu · Fri Mar 25 12:53:44 2016 +0530
  44. b81fe87 net: zynq_gem: Return error incase of invalid phy address by Siva Durga Prasad Paladugu · Wed Mar 30 12:29:49 2016 +0530
  45. 7f4e555 net: gem: Allow to set the MAC from an EEPROM by Joe Hershberger · Tue Jan 26 11:57:03 2016 -0600
  46. 65d3f3a net: zynq_gem: Add support for SGMII interface by Siva Durga Prasad Paladugu · Fri Feb 05 13:22:11 2016 +0530
  47. 780c535 net: zynq: Change MDC setup for arm64 by Michal Simek · Tue Sep 08 17:20:01 2015 +0200
  48. 93597d7 net: zynq_gem: Use shared wait_for_bit by Mateusz Kulikowski · Sat Jan 23 11:54:33 2016 +0100
  49. 27ba090 net: gem: Add driver dependencies to PHYLIB by Michal Simek · Fri Dec 11 09:14:31 2015 +0100
  50. 57b0269 net: gem: Separate recv and free_pkt functions by Michal Simek · Wed Dec 09 14:26:48 2015 +0100
  51. 139f410 net: gem: Fix return value from recv by Michal Simek · Wed Dec 09 14:16:32 2015 +0100
  52. c6aa413 net: gem: Setup default phy address to -1 by Michal Simek · Wed Dec 09 09:29:12 2015 +0100
  53. d9cfa97 net: gem: Enable CTRL+C in wait_for_bit by Michal Simek · Thu Sep 24 20:13:45 2015 +0200
  54. 3c4ce3c net: gem: Read information about interface from DT by Michal Simek · Mon Nov 30 14:17:50 2015 +0100
  55. 250e05e net: gem: Move driver to DM by Michal Simek · Mon Nov 30 14:14:56 2015 +0100
  56. 3f8c635 net: gem: Fix miiphy_read name by Michal Simek · Mon Nov 30 14:14:37 2015 +0100
  57. df3b414 net: gem: Remove zynq_gem_of_init() by Michal Simek · Mon Nov 30 14:00:20 2015 +0100
  58. e9ecc1c net: gem: Enable MDIO bus earlier by Michal Simek · Mon Nov 30 13:58:36 2015 +0100
  59. 2c68e08 net: gem: Check if priv->phydev is valid by Michal Simek · Mon Nov 30 14:03:37 2015 +0100
  60. 7cd7ea6 net: gem: Extract phy init code by Michal Simek · Mon Nov 30 13:54:43 2015 +0100
  61. 43b3832 net: gem: Remove phydev variable by Michal Simek · Mon Nov 30 13:44:49 2015 +0100
  62. 1a63ee2 net: gem: Change mii function not to use eth_device structure by Michal Simek · Mon Nov 30 10:24:15 2015 +0100
  63. 3ce1615 net: gem: Change mdio_wait prototype to pass regs by Michal Simek · Mon Nov 30 10:09:43 2015 +0100
  64. 75fbb69 net: gem: Do not continue if phy is not found by Michal Simek · Mon Nov 30 13:38:32 2015 +0100
  65. 728d32e net: zynq: Fix MDC setting for zynq by Michal Simek · Tue Sep 08 17:07:01 2015 +0200
  66. d5abec6 net: zynq: Remove unused MDCCLKDIV2 macro by Michal Simek · Tue Sep 08 16:54:39 2015 +0200
  67. 6429595 net: zynq: Fix mdc clock division setting for 100Mbit/s by Michal Simek · Tue Sep 08 16:55:42 2015 +0200
  68. 975ae35 net: zynq: Wait till packet is sent by Michal Simek · Mon Aug 17 09:57:46 2015 +0200
  69. 2304511 net: zynq: Disable secondary queues by Edgar E. Iglesias · Fri Sep 25 23:50:07 2015 -0700
  70. 1dc446e net: zynq: Add dummy packet to fix packet duplication issue by Michal Simek · Mon Aug 17 09:58:54 2015 +0200
  71. f91f7e5 net: zynq: Do not report TX underrun by Michal Simek · Mon Aug 17 09:51:34 2015 +0200
  72. b6fe7ad net: zynq: Setup BD when structures are filled by Michal Simek · Mon Aug 17 09:50:09 2015 +0200
  73. c6eb0bc net: zynq: Allocate BD_SPACE in connection to RX_BUF by Michal Simek · Mon Aug 17 09:45:53 2015 +0200
  74. ff5dbef net: zynq: Fix clearing statistic by Michal Simek · Mon Oct 05 12:49:48 2015 +0200
  75. 74a86e8 net: zynq: Extend register description with offsets by Michal Simek · Mon Oct 05 11:49:43 2015 +0200
  76. 492de0f net: zynq: Add support for different PHY interface types by Michal Simek · Wed Oct 07 16:42:56 2015 +0200
  77. c919c2c net: zynq: Add debug message to phyread/phywrite by Michal Simek · Wed Oct 07 16:34:51 2015 +0200
  78. 1e9e619 driver: net: Fix pointer conversion warnings for xilinx_zynqmp_ep by Prabhakar Kushwaha · Sun Oct 25 13:18:54 2015 +0530
  79. 366b24f of: clean up OF_CONTROL ifdef conditionals by Masahiro Yamada · Wed Aug 12 07:31:55 2015 +0900
  80. 3b4b5db net: gem: Extend timeout value by Michal Simek · Tue Oct 16 17:37:11 2012 +0200
  81. aaf9cc1 zynq: gem: Setting up WRAP bit for one TX bd by Michal Simek · Tue May 26 12:01:12 2015 +0200
  82. 55931cf zynq: gem: Increase the Rx buffer descriptors to 32 by Siva Durga Prasad Paladugu · Wed Apr 15 12:15:01 2015 +0530
  83. 2b0690e zynqmp: gem: Flush the rx buffers while transmitting by Siva Durga Prasad Paladugu · Sat Dec 06 12:57:53 2014 +0530
  84. 71245a4 zynqmp: gem: Set data bus width to 64bit for arm64 by Siva Durga Prasad Paladugu · Tue Jul 08 15:31:03 2014 +0530
  85. 0afb6b2 net: gem: Use correct type for casting by Michal Simek · Wed Apr 15 13:31:28 2015 +0200
  86. 9f09a36 net: cosmetic: Fix var naming net <-> eth drivers by Joe Hershberger · Wed Apr 08 01:41:06 2015 -0500
  87. 13b4d3c net: gem: Use phys_addr_t instead of int for addresses by Michal Simek · Wed Jan 14 15:44:21 2015 +0100
  88. b055f67 net: zynq: Fix sparse warnings in gem by Michal Simek · Fri Apr 25 14:17:38 2014 +0200
  89. 5031623 net: zynq: Use predefined macros instead of hardcoded value by Michal Simek · Tue Feb 25 10:25:38 2014 +0100
  90. 12dbc40 net: gem: Add OF initialization support by Michal Simek · Mon Feb 24 11:16:30 2014 +0100
  91. 4dded98 net: zynq_gem: Calculate clock dividers dynamically by Soren Brinkmann · Thu Nov 21 13:39:01 2013 -0800
  92. 3b5b992 net: zynq_gem: Move RCLK details out of driver by Soren Brinkmann · Thu Nov 21 13:39:00 2013 -0800
  93. 216b96d net: gem: Check if phy was correctly detected by Michal Simek · Tue Nov 12 14:25:29 2013 +0100
  94. cbf20b2 net: zynq_gem: Add d-cache support by Srikanth Thokala · Fri Nov 08 22:55:48 2013 +0530
  95. bd8ec7e Coding Style cleanup: remove trailing white space by Wolfgang Denk · Mon Oct 07 13:07:26 2013 +0200
  96. d79de1d Add GPL-2.0+ SPDX-License-Identifier to source files by Wolfgang Denk · Mon Jul 08 09:37:19 2013 +0200
  97. ab72cb4 net: gem: Add support for phy autodetection by Michal Simek · Mon Apr 22 14:41:09 2013 +0200
  98. 73875dc net: gem: Preserve clk on emio interface by David Andrey · Fri Apr 05 17:24:24 2013 +0200
  99. 1b0dd5e net: gem: Pass phy address to init by David Andrey · Thu Apr 04 19:13:07 2013 +0200
  100. d9f2c11 net: gem: Fix gem driver on 1Gbps LAN by Michal Simek · Mon Oct 15 14:01:23 2012 +0200