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git01.mediatek.com / filogic / uboot / c6411f0027b17f38ecfbfe87adf7b0b7a119e3e3 / arch / arm / dts / socfpga_arria10.dtsi
  1. c6411f0 ARM: dts: socfpga: Add missing UART resets by Marek Vasut · 6 years ago
  2. a292bd9 ARM: dts: socfpga: Flag reset manager on A10 as pre-reloc by Marek Vasut · 6 years ago
  3. 66803de ARM: dts: socfpga: Adjust NAND register layout on Arria10 by Marek Vasut · 7 years ago
  4. 03f80b1 ARM: socfpga: Synchronize Arria10 DTs by Marek Vasut · 7 years ago
  5. feaa3f9 dts: cadence_spi: Sync DT bindings with Linux by Jason Rush · 7 years ago
  6. 2f72120 arm: dts: Add dts and dtsi for Arria 10 by Ley Foon Tan · 8 years ago