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git01.mediatek.com / filogic / uboot / ba14c9989b55b29153a13b1de51ecd2e7363ba63 / include / dt-bindings / clock / mt7622-clk.h
  1. 58c6845 clk: mediatek: mt7622: add missing A1/2SYS clock ID by Christian Marangi · Sat Aug 03 10:43:26 2024 +0200
  2. 24f10ca clk: mediatek: mt7622: add missing clock PERIBUS_SEL clock by Christian Marangi · Sat Aug 03 10:43:25 2024 +0200
  3. 66b75e4 clk: mediatek: mt7622: add missing clock PERI_UART4_PD by Christian Marangi · Sat Aug 03 10:43:24 2024 +0200
  4. 10bf15f clk: mediatek: mt7622: add missing clock MUX1_SEL by Christian Marangi · Sat Aug 03 10:43:23 2024 +0200
  5. 5ef8a21 clk: mediatek: mt7622: add missing clock define for MAIN_CORE_EN by Christian Marangi · Sat Aug 03 10:43:22 2024 +0200
  6. 614ae87 clk: mediatek: mt7622: move INFRA_TRNG to the bottom by Christian Marangi · Sat Aug 03 10:43:21 2024 +0200
  7. fa5ee2a clk: mediatek: mt7622: rename AUDIO_AWB3 to AUDIO_AWB2 by Christian Marangi · Sat Aug 03 10:43:20 2024 +0200
  8. 3fd6633 WS cleanup: remove trailing empty lines by Wolfgang Denk · Mon Sep 27 17:42:36 2021 +0200
  9. dea5651 clk: mediatek: add driver for MT7622 by developer · Fri Jan 10 16:30:29 2020 +0800