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git01.mediatek.com / filogic / uboot / b3df0b5e5ec2101b23e6b2d8b1b2c4816e02610e / arch / arm / dts / socfpga_arria10.dtsi
  1. d5957fb ARM: dts: socfpga: Add missing SDMMC reset by Tien Fong Chee · Sun Dec 30 16:13:45 2018 +0800
  2. 454c9b3 spi: cadence_qspi: use "cdns,qspi-nor" as compatible by Simon Goldschmidt · Fri Nov 02 11:54:51 2018 +0100
  3. a313da3 ARM: dts: socfpga: Add missing NAND reset by Marek Vasut · Tue Aug 21 15:54:22 2018 +0200
  4. 6544d3e ARM: dts: socfpga: Flag timer clock as pre-reloc by Marek Vasut · Sat Aug 18 19:13:28 2018 +0200
  5. c2b2144 ARM: dts: socfpga: Add u-boot,dm-pre-reloc to necessary clock nodes by Marek Vasut · Mon Aug 06 22:07:40 2018 +0200
  6. de75674 ARM: dts: socfpga: Add missing I2C resets by Marek Vasut · Mon Aug 13 20:40:44 2018 +0200
  7. fbf9e40 ARM: dts: socfpga: Fix Arria10 GMAC resets by Marek Vasut · Mon Aug 13 20:24:20 2018 +0200
  8. c6411f0 ARM: dts: socfpga: Add missing UART resets by Marek Vasut · Mon Aug 13 18:42:39 2018 +0200
  9. a292bd9 ARM: dts: socfpga: Flag reset manager on A10 as pre-reloc by Marek Vasut · Mon Aug 13 18:42:32 2018 +0200
  10. 66803de ARM: dts: socfpga: Adjust NAND register layout on Arria10 by Marek Vasut · Mon May 07 22:22:26 2018 +0200
  11. 03f80b1 ARM: socfpga: Synchronize Arria10 DTs by Marek Vasut · Mon Apr 23 01:37:57 2018 +0200
  12. feaa3f9 dts: cadence_spi: Sync DT bindings with Linux by Jason Rush · Tue Jan 23 17:13:10 2018 -0600
  13. 2f72120 arm: dts: Add dts and dtsi for Arria 10 by Ley Foon Tan · Wed Apr 26 02:44:44 2017 +0800