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git01.mediatek.com / filogic / uboot / a950f1a2eac1a1e6b534724412dbf3ff6d388bdb / arch / arm / include / asm / system.h
  1. 4d776d0 arm: caches: Make DCACHE_DEFAULT_OPTION accessible for ARM64 arch by Patrice Chotard · Fri Oct 27 16:42:56 2023 +0200
  2. 8a457ad driver: rng: Add DM_RNG interface for ARMv8.5 RNDR registers by Andre Przywara · Wed Aug 30 12:32:30 2023 +0100
  3. 3a5c052 armv8: Always unmask SErrors by Andre Przywara · Fri Feb 11 11:29:35 2022 +0000
  4. 3a6d453 Revert most of the series for adding vexpress_aemv8r support by Tom Rini · Fri Sep 03 10:40:28 2021 -0400
  5. 504384e psci: fix double declaration by Oleksandr Suvorov · Tue Aug 24 00:55:39 2021 +0300
  6. ac33c06 armv8: Ensure EL1&0 VMSA is enabled by Peter Hoyes · Thu Aug 19 16:53:10 2021 +0100
  7. 6f4a27d armv8: Disable pointer authentication traps for EL1 by Peter Hoyes · Thu Aug 19 16:53:09 2021 +0100
  8. 5526210 armv8: Initialize CNTFRQ if at highest exception level by Peter Hoyes · Mon Jul 12 15:04:21 2021 +0100
  9. fb1c0ae arm: remove set_dacr/get_dacr functions by Patrick Delaunay · Fri Feb 05 13:53:39 2021 +0100
  10. d133261 arm: cosmetic: align TTB_SECT define value by Patrick Delaunay · Fri Feb 05 13:53:35 2021 +0100
  11. 061801e arm: remove TTB_SECT_XN_MASK in DCACHE_WRITETHROUGH by Patrick Delaunay · Fri Feb 05 13:53:34 2021 +0100
  12. 1c45ed9 common: board_r: Drop initr_noncached wrapper by Ovidiu Panait · Sat Nov 28 10:43:13 2020 +0200
  13. deb4edb arm: enable allocate-on-read for LPAE's DCACHE_WRITEBACK/_WRITETHROUGH by Ard Biesheuvel · Tue Jul 07 12:07:07 2020 +0200
  14. f76fb51 arm: provide a function for boards init code to modify MMU virtual-physical map by Marek Szyprowski · Wed Jun 03 14:43:42 2020 +0200
  15. dacbb3b arm: update comments to the common style by Marek Szyprowski · Wed Jun 03 14:43:41 2020 +0200
  16. ea9a22d arm: use correct argument size of special registers by Heinrich Schuchardt · Wed May 27 20:04:24 2020 +0200
  17. b047d1b ARM: add psci_arch_init() declaration for CONFIG_ARMV7_PSCI by Masahiro Yamada · Wed May 20 11:43:34 2020 +0900
  18. 1e26864 arm: Don't include common.h in header files by Simon Glass · Sun May 10 11:39:55 2020 -0600
  19. d7e6a1d arm: caches: add DCACHE_DEFAULT_OPTION by Patrick Delaunay · Fri Apr 24 20:20:16 2020 +0200
  20. 45bbe71 arm: cpu: armv8: add support for arm psci reset2. by Rajesh Ravi · Fri Nov 22 14:50:01 2019 -0800
  21. 9c59d86 psci: Fix warnings when compiling with W=1 by Patrick Delaunay · Mon Jul 22 14:19:20 2019 +0200
  22. b07ac0c ARMv8: Enable all asynchronous abort exceptions taken to EL3 by Chee Hong Ang · Mon Aug 20 10:57:34 2018 -0700
  23. 81b1a67 arm: v7: Kconfig: Rename CPU_V7 as CPU_V7A by Lokesh Vutla · Thu Apr 26 18:21:26 2018 +0530
  24. cd36d45 arm: make save_boot_params_ret prototype visible for AArch64 by Philipp Tomsich · Tue Oct 10 16:21:11 2017 +0200
  25. ffea3e6 armv8: layerscape: Enable falcon boot by York Sun · Thu Sep 28 08:42:14 2017 -0700
  26. 4415c3b arm: Support cache invalidate by Simon Glass · Wed Apr 05 17:53:18 2017 -0600
  27. 5bb14e0 armv8: mmu: Add a function to change mapping attributes by York Sun · Mon Mar 06 09:02:33 2017 -0800
  28. eb2088d armv8: aarch64: Fix the warning about x1-x3 nonzero issue by Alison Wang · Tue Jan 17 09:39:17 2017 +0800
  29. 05725ed ARMv8: Setup PSCI memory and device tree by macro.wave.z@gmail.com · Thu Dec 08 11:58:25 2016 +0800
  30. f547fca armv8: fsl-layerscape: Support loading 32-bit OS with PSCI enabled by Alison Wang · Thu Nov 10 10:49:05 2016 +0800
  31. 73818d5 armv8: Support loading 32-bit OS in AArch32 execution state by Alison Wang · Thu Nov 10 10:49:03 2016 +0800
  32. 266c8c1 arm: Set TTB XN bit in case DCACHE_OFF for LPAE mode by Keerthy · Sat Oct 29 15:19:10 2016 +0530
  33. ddb0f63 armv8: add hooks for all cache-wide operations by Stephen Warren · Wed Oct 19 15:18:46 2016 -0600
  34. 467c83e arm: Add PSCI shutdown function by Alexander Graf · Tue Aug 16 21:08:47 2016 +0200
  35. a5b1832 arm: Disable HVC PSCI calls by default by Alexander Graf · Tue Aug 16 21:08:46 2016 +0200
  36. 61488c1 ARM: Introduce function to switch to hypervisor mode by Keerthy · Wed Sep 14 10:43:32 2016 +0530
  37. 3b787ef ARM: Rework and correct barrier definitions by Tom Rini · Mon Aug 01 18:54:53 2016 -0400
  38. b8845e1 arm: implement generic PSCI reset call for armv8 by Beniamino Galvani · Sun May 08 08:30:14 2016 +0200
  39. ae6c2bc arm: Add support for HYP mode and LPAE page tables by Alexander Graf · Wed Mar 16 15:41:21 2016 +0100
  40. 188c8ff arm64: Add 32bit arm compatible dcache definitions by Alexander Graf · Wed Mar 16 15:41:20 2016 +0100
  41. ce0a64e arm64: Remove non-full-va map code by Alexander Graf · Fri Mar 04 01:09:54 2016 +0100
  42. e317fe8 arm64: Make full va map code more dynamic by Alexander Graf · Fri Mar 04 01:09:47 2016 +0100
  43. d6e436e arm: Remove S bit from MMU section entry by Marek Vasut · Tue Dec 29 19:44:02 2015 +0100
  44. fbf49c0 arm: Replace test for CONFIG_ARMV7 with CONFIG_CPU_V7 by Marek Vasut · Tue Dec 29 19:44:01 2015 +0100
  45. 064949c armv8: Add Secure Monitor/Hypervisor Call (SMC/HVC) infrastructure by Sergey Temerkhanov · Wed Oct 14 09:55:46 2015 -0700
  46. 78eaa49 armv8: New MMU setup code allowing to use 48+ bits PA/VA by Sergey Temerkhanov · Wed Oct 14 09:55:45 2015 -0700
  47. 6774e4e armv8: Add read_mpidr() function by Sergey Temerkhanov · Wed Oct 14 09:55:44 2015 -0700
  48. fbdcd22 armv8: enable compilation with CONFIG_SYS_NONCACHED_MEMORY by Stephen Warren · Mon Oct 05 12:08:59 2015 -0600
  49. d89b72c arm: mmu: Add missing volatile for reading SCTLR register by Alison Wang · Wed Sep 09 10:22:02 2015 +0800
  50. ba2432a armv8: caches: Added routine to set non cacheable region by Siva Durga Prasad Paladugu · Fri Jun 26 18:05:07 2015 +0530
  51. 32db57d arm: Add a prototype for save_boot_params_ret() by Simon Glass · Mon May 04 11:31:03 2015 -0600
  52. d07e7b0 tegra124: Reserve secure RAM using MC_SECURITY_CFG{0, 1}_0 by Ian Campbell · Tue Apr 21 07:18:36 2015 +0200
  53. 29d23ec ARMv7 TLB: Fixed TTBR0 and Table Descriptors to allow caching by Bryan Brinsko · Tue Mar 24 11:25:12 2015 -0500
  54. 1ce575f armv8/fsl-lsch3: Convert flushing L3 to assembly to avoid using stack by York Sun · Tue Jan 06 13:18:42 2015 -0800
  55. 47197fe arm: Allow lr to be saved by board code by Simon Glass · Sat Feb 07 10:47:28 2015 -0700
  56. c97d974 ARM: Implement non-cached memory support by Thierry Reding · Tue Dec 09 22:25:22 2014 -0700
  57. fe200715 ARM: cache-cp15: Use more accurate types by Thierry Reding · Tue Aug 26 17:34:21 2014 +0200
  58. 79b9072 arm: cache: Add support for write-allocate D-Cache by Marek Vasut · Mon Sep 15 02:44:36 2014 +0200
  59. a84cd72 ARMv8/FSL_LSCH3: Add FSL_LSCH3 SoC by York Sun · Mon Jun 23 15:15:54 2014 -0700
  60. ef04201 armv8/cache: Change cache invalidate and flush function by York Sun · Wed Feb 26 13:26:04 2014 -0800
  61. 85fd5f1 arm64: core support by David Feng · Sat Dec 14 11:47:35 2013 +0800
  62. 06396c1 ARM: mmu: Set domain permissions to client access by R Sricharan · Mon Mar 04 20:04:45 2013 +0000
  63. aa47030 ARM: add wfi assembly macro by Rob Herring · Sun Dec 02 17:06:21 2012 +0000
  64. a4f2079 arm: Add control over cachability of memory regions by Simon Glass · Wed Oct 17 13:24:53 2012 +0000
  65. 3cba3c1 Move architecture-specific includes to arch/$ARCH/include/asm by Peter Tyser · Mon Apr 12 22:28:08 2010 -0500[Renamed from include/asm-arm/system.h]
  66. 9053b5a arm: update co-processor 15 access by Jean-Christophe PLAGNIOL-VILLARD · Sun Apr 05 13:02:43 2009 +0200