Gitiles
Code Review
Sign In
git01.mediatek.com
/
filogic
/
uboot
/
9e2dd660bb7b857bdd037463b20dc87e6583016f
/
drivers
/
fpga
3fd6633
WS cleanup: remove trailing empty lines
by Wolfgang Denk
· Mon Sep 27 17:42:36 2021 +0200
8a71416
arm: socfpga: Move Stratix10 and Agilex to use TARGET_SOCFPGA_SOC64
by Siew Chin Lim
· Mon Mar 01 20:04:10 2021 +0800
df070ce
Merge tag 'xilinx-for-v2021.04-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze
by Tom Rini
· Tue Feb 23 10:45:55 2021 -0500
36eca7c
fpga: zynqpl: fix buffer alignment
by Michael Walle
· Wed Feb 10 22:42:29 2021 +0100
d563c25
image: Adjust the workings of fit_check_format()
by Simon Glass
· Mon Feb 15 17:08:09 2021 -0700
3ba929a
common: Drop asm/global_data.h from common header
by Simon Glass
· Fri Oct 30 21:38:53 2020 -0600
ec4c679
arm: socfpga: soc64: Add ATF support for FPGA reconfig driver
by Chee Hong Ang
· Thu Dec 24 18:21:07 2020 +0800
89ac34d
arm: socfpga: agilex: Enable FPGA Full Reconfiguration support
by Chee Hong Ang
· Fri Aug 07 11:50:05 2020 +0800
4e87fcd
fpga: intel_sdm_mb: Add watchdog reset
by Chee Hong Ang
· Fri Aug 07 11:50:04 2020 +0800
1419245
fpga: altera: Rename Stratix10 FPGA to Intel FPGA SDM Mailbox
by Chee Hong Ang
· Fri Aug 07 11:50:03 2020 +0800
cd70834
fpga: zynqmp: Protect zynqmp_loads() for SPL
by Michal Simek
· Thu Sep 10 12:57:16 2020 +0200
74076ba
fpga: zynqmp: Get rid of ZYNQMP_SIP_SVC* macros
by Michal Simek
· Wed Sep 09 13:25:40 2020 +0200
0768aeb
xilinx: zynqmp: synchronize firmware call return payload
by Ibai Erkiaga
· Tue Aug 04 23:17:26 2020 +0100
ef8a4e6
fs: fs-loader: Drop dm.h header file
by Simon Glass
· Sun Jul 19 10:15:38 2020 -0600
274410a
arm64: xilinx: Print fpga error value in hex
by T Karthik Reddy
· Thu May 14 07:49:36 2020 -0600
1fa7cbe
fpga: zynqpl: Flush dcache only for non-bitstream data
by T Karthik Reddy
· Tue Mar 12 20:20:23 2019 +0530
59d9ab7
fpga: zynqpl: Check if aes engine is enabled
by Ibai Erkiaga
· Thu Apr 05 05:19:27 2018 -0700
f3b078f
fpga: zynqpl: Check fpga config completion
by T Karthik Reddy
· Tue Mar 12 20:20:20 2019 +0530
c575058
fpga: zynqpl: Correct PL bitstream loading sequence for zynqaes
by Siva Durga Prasad Paladugu
· Wed Dec 09 18:46:43 2015 +0530
4dcacfc
common: Drop linux/bitops.h from common header
by Simon Glass
· Sun May 10 11:40:13 2020 -0600
dbd7954
common: Drop linux/delay.h from common header
by Simon Glass
· Sun May 10 11:40:11 2020 -0600
0db4b94
Fix some checkpatch warnings in calls to udelay()
by Simon Glass
· Sun May 10 11:40:10 2020 -0600
0f2af88
common: Drop log.h from common header
by Simon Glass
· Sun May 10 11:40:05 2020 -0600
9758973
common: Drop init.h from common header
by Simon Glass
· Sun May 10 11:40:02 2020 -0600
2dc9c34
common: Drop image.h from common header
by Simon Glass
· Sun May 10 11:40:01 2020 -0600
274e0b0
common: Drop net.h from common header
by Simon Glass
· Sun May 10 11:39:56 2020 -0600
9bc1564
dm: core: Create a new header file for 'compat' features
by Simon Glass
· Mon Feb 03 07:36:16 2020 -0700
3d3a860
arm: socfpga: Convert system manager from struct to defines
by Ley Foon Tan
· Fri Nov 08 10:38:20 2019 +0800
6333448
common: Move ARM cache operations out of common.h
by Simon Glass
· Thu Nov 14 12:57:39 2019 -0700
1d91ba7
common: Move some cache and MMU functions out of common.h
by Simon Glass
· Thu Nov 14 12:57:37 2019 -0700
4c3de37
arm64: zynqmp: Convert invoke_smc() to xilinx_pm_request()
by Michal Simek
· Fri Oct 04 15:35:45 2019 +0200
142fb5b
arm64: versal: Rename versal_pm_request to xilinx_pm_request
by Michal Simek
· Fri Oct 04 15:52:43 2019 +0200
81efd2a
arm64: xilinx: Move firmware functions from platform to driver
by Michal Simek
· Fri Oct 04 15:45:29 2019 +0200
6aa5bc8
arm64: zynqmp: use firmware driver to get version
by Ibai Erkiaga
· Fri Sep 27 11:37:02 2019 +0100
c8a3efa
firmware: zynqmp: create firmware header
by Ibai Erkiaga
· Fri Sep 27 11:37:01 2019 +0100
2712114
fpga: zynqmp: Fix second local variable declaration
by Michal Simek
· Fri Aug 02 12:43:29 2019 +0200
b739897
arm64: versal: fpga: Add PL bit stream load support
by Siva Durga Prasad Paladugu
· Mon Aug 05 15:54:59 2019 +0530
d52678c
fpga: altera: cyclon2: Check function pointer before calling
by Alexander Dahl
· Fri Jun 28 14:41:23 2019 +0200
a8da71c
fpga: altera: cyclon2: Fix indentation
by Alexander Dahl
· Fri Jun 28 14:41:22 2019 +0200
246bc02
fpga: altera: cyclon2: Fix most checkpatch warnings
by Alexander Dahl
· Fri Jun 28 14:41:21 2019 +0200
0b88834
fpga: virtex2: Add slave serial programming support
by Robert Hancock
· Tue Jun 18 09:47:16 2019 -0600
7b5140c
fpga: virtex2: Add additional clock cycles after DONE assertion
by Robert Hancock
· Tue Jun 18 09:47:15 2019 -0600
8a7d663
fpga: virtex2: Split out image writing from pre/post operations
by Robert Hancock
· Tue Jun 18 09:47:14 2019 -0600
be7f746
fpga: virtex2: added Kconfig option
by Robert Hancock
· Tue Jun 18 09:47:13 2019 -0600
19b55dc
fpga: virtex2: cosmetic: Cleanup code style
by Robert Hancock
· Tue Jun 18 09:47:12 2019 -0600
0e13e5f
fpga: arria10: Fix error in fpga pin configuration
by Dalon Westergreen
· Tue Jul 16 09:28:10 2019 -0700
fe03d80
spl: socfpga: Implement fpga bitstream loading with socfpga loadfs
by Tien Fong Chee
· Tue May 07 17:42:30 2019 +0800
ca99a8a
ARM: socfpga: Add FPGA drivers for Arria 10 FPGA bitstream loading
by Tien Fong Chee
· Tue May 07 17:42:28 2019 +0800
725b122
ARM: socfpga: Moving the watchdog reset to the for-loop status polling
by Tien Fong Chee
· Tue May 07 17:42:27 2019 +0800
7f3dace
ARM: socfpga: Cleaning up and ensuring consistent format messages in driver
by Tien Fong Chee
· Tue May 07 17:42:26 2019 +0800
9bf652d
arm: zynq: Add an info message about post config
by Siva Durga Prasad Paladugu
· Sat Mar 23 16:01:36 2019 +0530
3b45f6b
fpga: Replace char * with const char * for filename
by Tien Fong Chee
· Fri Feb 15 15:57:07 2019 +0800
c4192f7
ARM: socfpga: stratix10: Return valid error code from FPGA driver
by Ang, Chee Hong
· Sun Feb 17 20:07:50 2019 -0800
add7f41d
fpga: zynqmp: show an error message when FPGA programming fails
by Luca Ceresoli
· Fri Jan 11 17:09:45 2019 +0100
ff14f16
arm: socfpga: stratix10: Add Stratix10 FPGA into FPGA device table
by Ang, Chee Hong
· Wed Dec 19 18:35:15 2018 -0800
dcc3bb6
arm: socfpga: stratix10: Add Stratix 10 FPGA Reconfiguration Driver
by Ang, Chee Hong
· Wed Dec 19 18:35:14 2018 -0800
4003448
arm: socfpga: fpga: fix type of local variable
by Simon Goldschmidt
· Mon Oct 15 20:35:10 2018 +0200
62fe313
fpga: zynqmp: Modify PL bitstream loading sequence
by Siva Durga Prasad Paladugu
· Tue Aug 21 15:44:50 2018 +0530
55af55a
fpga: Kconfig: Replace spaces with tabs
by Michal Simek
· Mon Jul 23 15:59:55 2018 +0200
4397602
drivers: fpga: zynqpl: fix compilation with SPL
by Luis Araneda
· Thu Jul 19 03:10:17 2018 -0400
e460352
xilinx: zynq: Add support to secure images
by Siva Durga Prasad Paladugu
· Tue Jun 26 15:02:19 2018 +0530
6809e81
fpga: zynqmp: Add secure bitstream loading for ZynqMP
by Siva Durga Prasad Paladugu
· Thu May 31 15:10:23 2018 +0530
cce0cb0
cmd: fpga: Add support to load secure bitstreams
by Siva Durga Prasad Paladugu
· Thu May 31 15:10:22 2018 +0530
10e4779
SPDX: Convert all of our single license tags to Linux Kernel style
by Tom Rini
· Sun May 06 17:58:06 2018 -0400
bdfb5c4
Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR
by Tom Rini
· Wed Apr 18 13:50:47 2018 -0400
2c0f3ae
arm: socfpga: Fix with the correct polling on bit is set
by Tien Fong Chee
· Tue Dec 05 15:57:58 2017 +0800
eac0cd1
fpga: zynq: Add delay after PCFG_PROG_B change
by Siva Durga Prasad Paladugu
· Tue Mar 06 17:37:09 2018 +0530
e4d16c2
fpga: zynqmp: Fix the nonsecure bitstream loading issue
by Siva Durga Prasad Paladugu
· Thu Mar 15 00:17:24 2018 +0530
91c315d
fpga: zynqmp: Update zynqmp_load() as per latest xilfpga
by Siva Durga Prasad Paladugu
· Thu Mar 01 17:44:47 2018 +0530
d9361d4
fpga: zynqmp: Add support to get the PCAP status for fpga info command
by Nitin Jain
· Fri Feb 16 17:29:54 2018 +0530
3529c11
fpga: Simplify error path in fpga_add
by Michal Simek
· Fri Jan 26 13:17:04 2018 +0100
4a4946b
arm: zynq: fpga: Added Kconfig support for CONFIG_FPGA_ZYNQPL
by Vipul Kumar
· Fri Feb 16 18:02:51 2018 +0530
b8f64b9
fpga: Added Kconfig support for FPGA_SPARTAN3
by Vipul Kumar
· Fri Feb 16 18:02:49 2018 +0530
918de03
wait_bit: use wait_for_bit_le32 and remove wait_for_bit
by Álvaro Fernández Rojas
· Tue Jan 23 17:14:55 2018 +0100
9179c81
fpga: allow programming fpga from FIT image for all FPGA drivers
by Goldschmidt Simon
· Fri Nov 10 14:17:41 2017 +0000
c604b0a
arm: socfpga: Enhance FPGA program write rbf data with size >= 4 bytes
by Tien Fong Chee
· Mon Sep 25 16:40:01 2017 +0800
3da614c
fpga: xilinx: Avoid using local intermediate buffer
by Siva Durga Prasad Paladugu
· Thu Mar 02 18:50:11 2017 +0530
1d675f3
arm: socfpga: Add FPGA driver support for Arria 10
by Tien Fong Chee
· Wed Jul 26 13:05:43 2017 +0800
cde4219
kconfig: Convert FPGA_SOCFPGA configuration to Kconfig
by Tien Fong Chee
· Wed Jul 26 13:05:40 2017 +0800
31e50f4
arm: socfpga: Restructure FPGA driver in the preparation to support A10
by Tien Fong Chee
· Wed Jul 26 13:05:38 2017 +0800
4e98589
fpga: zynqmppl: Reuse invoke_smc routine
by Siva Durga Prasad Paladugu
· Fri Feb 17 16:16:01 2017 +0530
69f14ce
FPGA: drivers/fpga/ivm_core.c: incorrect printf
by xypron.glpk@gmx.de
· Sat Apr 15 15:15:40 2017 +0200
117b6ca
fpga: zynqmp: Remove empty functions
by Michal Simek
· Fri Dec 16 10:01:45 2016 +0100
ba81b04
arm: imx: add i.MX53 Beckhoff CX9020 Embedded PC
by Patrick Bruenn
· Fri Nov 04 11:57:02 2016 +0100
56a931c
treewide: replace #include <asm/errno.h> with <linux/errno.h>
by Masahiro Yamada
· Wed Sep 21 11:28:55 2016 +0900
460fdce
fpga: xilinx: zynqmp: Add PL bitstream download support for ZynqMP
by Siva Durga Prasad Paladugu
· Wed Jan 13 16:25:37 2016 +0530
e34f1f6
fpga: Add Kconfig to fpga subsystem
by Michal Simek
· Mon Sep 19 10:41:55 2016 +0200
8d56db9
Various, unrelated tree-wide typo fixes.
by Robert P. J. Day
· Fri Jul 15 13:44:45 2016 -0400
b563a6b
fpga: Fix typo in function comment
by Michal Simek
· Tue May 17 14:32:00 2016 +0200
d919d72
fpga: altera: Add StratixV support
by Stefan Roese
· Fri Feb 12 13:48:02 2016 +0100
53d41e6
Fix spelling of "transferred".
by Vagrant Cascadian
· Tue Mar 15 12:16:39 2016 -0700
1e35776
Revert "arm: socfpga: set the fpga global bit to disable HPS to FPGA signals"
by Dinh Nguyen
· Tue Jan 19 09:16:21 2016 -0600
64b9709
fpga: xilinx: Check for substring in device ID validation
by Siva Durga Prasad Paladugu
· Mon Jan 11 12:30:41 2016 +0530
fd59e5f
arm: socfpga: set the fpga global bit to disable HPS to FPGA signals
by Dinh Nguyen
· Wed Jan 06 13:48:43 2016 -0600
a73bda4
Move console definitions into a new console.h file
by Simon Glass
· Sun Nov 08 23:47:45 2015 -0700
490dfd1
arm: socfpga: Fix FPGA bitstream programming routine
by Marek Vasut
· Mon Jul 27 22:34:54 2015 +0200
35d9ad2
fpga: xilinx: Show fpga info if defined
by Michal Simek
· Wed Jul 16 10:36:42 2014 +0200
1c1350d
fpga: xilinx: Check if fpga operations are defined
by Michal Simek
· Wed Jul 16 10:31:21 2014 +0200
fbadb76
fpga: Export fpga_get_desc for SPL
by Michal Simek
· Tue Jan 13 16:09:53 2015 +0100
96171fb
fs: API changes enabling extra parameter to return size of type loff_t
by Suriyan Ramasami
· Mon Nov 17 14:39:38 2014 -0800
Next »