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git01.mediatek.com / filogic / uboot / 9bc1564e0d5b9cfcd5eef7fe83fae233ff2faba6 / drivers / clk / rockchip / clk_rk3188.c
  1. 9bc1564 dm: core: Create a new header file for 'compat' features by Simon Glass · Mon Feb 03 07:36:16 2020 -0700
  2. d66c5f7 dm: core: Require users of devres to include the header by Simon Glass · Mon Feb 03 07:36:15 2020 -0700
  3. 416f8d3 rockchip: clk: fix wrong CONFIG_IS_ENABLED handling by Heiko Stuebner · Sat Nov 09 00:06:30 2019 +0100
  4. b4be5ca rockchip: rk3188: init CPU freq in clock driver by Kever Yang · Mon Jul 22 19:59:13 2019 +0800
  5. 9fbe17c rockchip: use 'arch-rockchip' as header file path by Kever Yang · Thu Mar 28 11:01:23 2019 +0800
  6. 10e4779 SPDX: Convert all of our single license tags to Linux Kernel style by Tom Rini · Sun May 06 17:58:06 2018 -0400
  7. bdfb5c4 Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR by Tom Rini · Wed Apr 18 13:50:47 2018 -0400
  8. 67df61f rockchip: clk: rk3188: update dpll settings to make EMAC work by Alexander Kochetkov · Mon Feb 26 14:27:38 2018 +0300
  9. 85be807 rockchip: clk: rk3188: convert to use live dt by Kever Yang · Sun Feb 11 11:53:06 2018 +0800
  10. 432976f rockchip: clk: bind reset driver by Elaine Zhang · Tue Dec 19 18:22:38 2017 +0800
  11. 4fbb6c2 rockchip: clock: update sysreset driver binding by Kever Yang · Fri Nov 03 15:16:13 2017 +0800
  12. f20995b rockchip: clk: remove RATE_TO_DIV by Kever Yang · Thu Jul 27 12:54:02 2017 +0800
  13. 99b546d rockchip: clk: update dwmmc clock div by Kever Yang · Thu Jul 27 12:54:01 2017 +0800
  14. ba1dea4 dm: Rename dev_addr..() functions by Simon Glass · Wed May 17 17:18:05 2017 -0600
  15. c06ade2 rockchip: clk: rk3188: add ciu_clk entry for eMMC/SDMMC/SDIO by Xu Ziyuan · Sun Apr 16 17:44:44 2017 +0800
  16. 4126265 rockchip: clk: rk3188: Allow configuration of the armclk by Heiko Stübner · Mon Mar 20 12:40:32 2017 +0100
  17. 5616c63 rockchip: rk3188: Add clock driver by Heiko Stübner · Sat Feb 18 19:46:34 2017 +0100