1. dada2d1 riscv: Enlarge the default SYS_MALLOC_F_LEN by Bin Meng · Wed Dec 12 06:12:33 2018 -0800
  2. 8fa4478 riscv: qemu: Add platform-specific Kconfig options by Bin Meng · Wed Dec 12 06:12:32 2018 -0800
  3. f3c8479 riscv: Implement riscv_get_time() API using rdtime instruction by Anup Patel · Wed Dec 12 06:12:31 2018 -0800
  4. b6ee5e1 riscv: Add a SYSCON driver for SiFive's Core Local Interruptor by Bin Meng · Wed Dec 12 06:12:30 2018 -0800
  5. 2788177 riscv: Introduce a Kconfig option for machine mode by Anup Patel · Wed Dec 12 06:12:29 2018 -0800
  6. ecc5d83 riscv: add Kconfig entries for the code model by Lukas Auer · Wed Dec 12 06:12:23 2018 -0800
  7. 89b3934 riscv: Add kconfig option to run U-Boot in S-mode by Anup Patel · Mon Dec 03 10:57:40 2018 +0530
  8. 842d580 riscv: cache: Implement i/dcache [status, enable, disable] by Rick Chen · Wed Nov 07 09:34:06 2018 +0800
  9. 002012f riscv: add Kconfig entries for the C and A ISA extensions by Lukas Auer · Thu Nov 22 11:26:14 2018 +0100
  10. 7ab1df0 riscv: select CONFIG_PHYS_64BIT on RV64I systems by Lukas Auer · Thu Nov 22 11:26:13 2018 +0100
  11. 54ebfe7 riscv: rename CPU_RISCV_32/64 to match architecture names ARCH_RV32I/64I by Lukas Auer · Thu Nov 22 11:26:12 2018 +0100
  12. 8a8694d riscv: Add QEMU virt board support by Bin Meng · Wed Sep 26 06:55:21 2018 -0700
  13. 6b69775 riscv: kconfig: Normalize architecture name spelling by Bin Meng · Wed Sep 26 06:55:06 2018 -0700
  14. b66af37 riscv: cpu: nx25: Rename as ax25 by Rick Chen · Tue May 29 09:54:40 2018 +0800
  15. 64d4ead riscv: Add Kconfig to support RISC-V by Rick Chen · Tue Dec 26 13:55:52 2017 +0800