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filogic
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uboot
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8c4e304d7e917ed1bc5e365779c16445f92a4521
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arch
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riscv
b1d2436
riscv: Support CONFIG_REMAKE_ELF
by Samuel Holland
· Mon Feb 20 00:02:39 2023 -0600
4478727
riscv: Update alignment for some sections in linker scripts
by Bin Meng
· Thu Apr 13 14:20:08 2023 +0800
604a0c5
riscv: spl: Remove relocation sections
by Bin Meng
· Thu Apr 13 14:20:07 2023 +0800
8615b1d
riscv: Avoid updating the link register
by Bin Meng
· Thu Apr 13 14:20:06 2023 +0800
63d0fe4
riscv: Change to use positive offset to access relocation entries
by Bin Meng
· Thu Apr 13 14:20:05 2023 +0800
73449c9
riscv: Optimize loading relocation type
by Bin Meng
· Thu Apr 13 14:20:01 2023 +0800
3ccd29e
riscv: Optimize source end address calculation in start.S
by Bin Meng
· Thu Apr 13 14:20:00 2023 +0800
722618e
riscv: Enforce DWARF4 output
by Bin Meng
· Fri Apr 07 13:44:59 2023 +0800
b5399d9
riscv: Correct a comment in io.h
by Bin Meng
· Mon Apr 03 11:37:32 2023 +0800
5efc934
riscv: dts: jh7110: Add initial StarFive VisionFive v2 board device tree
by Yanhong Wang
· Wed Mar 29 11:42:23 2023 +0800
94817bf
riscv: dts: jh7110: Add initial u-boot device tree
by Yanhong Wang
· Wed Mar 29 11:42:22 2023 +0800
96c3eb72
riscv: dts: jh7110: Add initial StarFive JH7110 device tree
by Yanhong Wang
· Wed Mar 29 11:42:21 2023 +0800
3867879
board: starfive: Add TARGET_STARFIVE_VISIONFIVE2 to Kconfig
by Yanhong Wang
· Wed Mar 29 11:42:20 2023 +0800
5203a63
riscv: cpu: jh7110: Add Kconfig for StarFive JH7110 SoC
by Yanhong Wang
· Wed Mar 29 11:42:18 2023 +0800
e28ec34
riscv: cpu: jh7110: Add support for jh7110 SoC
by Yanhong Wang
· Wed Mar 29 11:42:08 2023 +0800
c34de68
riscv: semihosting: replace inline assembly with assembly file
by Andre Przywara
· Tue Feb 07 15:21:05 2023 +0000
1c0b887
Merge tag 'v2023.04-rc3' into next
by Tom Rini
· Mon Feb 27 17:28:21 2023 -0500
ddcdd94
riscv: binman: Add help message for missing blobs
by Rick Chen
· Fri Feb 17 16:57:01 2023 +0800
249ce73
riscv: Rename Andes cpu and board names
by Leo Yu-Chi Liang
· Tue Feb 14 20:42:49 2023 +0800
e440ed4
configs: ae350: Enable v5l2 cache for AE350 platforms in SPL
by Yu Chien Peter Lin
· Mon Feb 06 16:10:50 2023 +0800
b2ccd1c
riscv: ax25: cache.c: Cleanups to L1/L2 cache function used in SPL
by Yu Chien Peter Lin
· Mon Feb 06 16:10:49 2023 +0800
5cc6b3f
riscv: ae350: dts: Update L2 cache compatible string
by Yu Chien Peter Lin
· Mon Feb 06 16:10:48 2023 +0800
82f0f53
riscv: cpu: ax25: Simplify cache enabling logic in harts_early_init()
by Yu Chien Peter Lin
· Mon Feb 06 16:10:47 2023 +0800
816979a
riscv: Remove redundant Kconfig "RISCV_NDS_CACHE"
by Leo Yu-Chi Liang
· Mon Feb 06 16:10:44 2023 +0800
52d54e1
riscv: global_data.h: Correct the comment for PLICSW
by Yu Chien Peter Lin
· Mon Feb 06 10:06:29 2023 +0800
d3a98cb
dm: dts: Convert driver model tags to use new schema
by Simon Glass
· Mon Feb 13 08:56:33 2023 -0700
ae7ed57
Correct SPL uses of LMB
by Simon Glass
· Sun Feb 05 15:40:13 2023 -0700
718e569
riscv: memcpy: check src and dst before copy
by Rick Chen
· Wed Jan 04 09:56:28 2023 +0800
08537f3
riscv: ax25: bypass malloc when spl fit boots from ram
by Rick Chen
· Wed Jan 04 09:55:43 2023 +0800
c1ec25e
riscv: ae350: Enable CCTL_SUEN
by Rick Chen
· Tue Jan 03 16:17:13 2023 +0800
c9382b1
riscv: cpu: check U-Mode before counteren write
by Nikita Shubin
· Wed Dec 14 08:58:43 2022 +0300
364d002
global: Finish CONFIG -> CFG migration
by Tom Rini
· Tue Jan 10 11:19:45 2023 -0500
a6b1b3b
Merge branch 'next'
by Tom Rini
· Mon Jan 09 11:30:08 2023 -0500
e84ab96
efi_loader: set IMAGE_FILE_LARGE_ADDRESS_AWARE
by Heinrich Schuchardt
· Fri Dec 23 02:16:03 2022 +0100
572c718
Convert CONFIG_STANDALONE_LOAD_ADDR to Kconfig
by Tom Rini
· Fri Dec 02 16:42:44 2022 -0500
c86cb4a
arch/riscv: add semihosting support for RISC-V
by Kautuk Consul
· Wed Dec 07 17:12:35 2022 +0530
693baee
riscv: clarify meaning of CONFIG_SBI_V02
by Heinrich Schuchardt
· Tue Nov 08 15:53:12 2022 +0100
a35afb8
riscv: Fix detecting FPU support in standard extension
by Yu Chien Peter Lin
· Sat Nov 05 14:02:14 2022 +0800
e828edd
riscv: dts: fix the mpfs's reference clock frequency
by Conor Dooley
· Tue Oct 25 08:58:49 2022 +0100
da2a6d0
riscv: dts: Add QSPI NAND device node
by Padmarao Begari
· Thu Oct 27 11:32:00 2022 +0530
c66a3b2
riscv: dts: Update memory configuration
by Padmarao Begari
· Thu Oct 27 11:31:59 2022 +0530
739cd6f
riscv: Rename Andes PLIC to PLICSW
by Yu Chien Peter Lin
· Tue Oct 25 23:03:50 2022 +0800
72cc538
Rename CONFIG_SYS_TEXT_BASE to CONFIG_TEXT_BASE
by Simon Glass
· Thu Oct 20 18:22:39 2022 -0600
bcb208b
riscv: andes_plic.c: use modified IPI scheme
by Yu Chien Peter Lin
· Fri Oct 14 15:00:18 2022 +0800
c66c950
riscv: support building double-float modules
by Heinrich Schuchardt
· Wed Oct 12 14:59:51 2022 +0200
43e1f93
riscv: Fix build against binutils 2.38
by Alexandre Ghiti
· Mon Oct 03 18:07:54 2022 +0200
2e4938b
dm: core: Drop ofnode_is_available()
by Simon Glass
· Tue Sep 06 20:27:17 2022 -0600
df00afa
treewide: Drop bootm_headers_t typedef
by Simon Glass
· Tue Sep 06 20:26:50 2022 -0600
eff2077
Merge branch 'next' of https://gitlab.denx.de/u-boot/custodians/u-boot-riscv into next
by Tom Rini
· Mon Sep 26 11:27:30 2022 -0400
9c4d5c1
riscv: Introduce AVAILABLE_HARTS
by Rick Chen
· Wed Sep 21 14:34:54 2022 +0800
7e5e029
spl: introduce SPL_XIP to config
by Nikita Shubin
· Fri Sep 02 11:47:39 2022 +0300
4f4f583
board_f: Fix types for board_get_usable_ram_top()
by Pali Rohár
· Fri Sep 09 17:32:40 2022 +0200
ebe3b23
riscv: dts: sifive: Synchronize FU740 and Unmatched DT
by Icenowy Zheng
· Thu Aug 25 16:11:19 2022 +0800
13d7170
dt-bindings: clock: sifive: sync FU740 PRCI clock binding header
by Icenowy Zheng
· Thu Aug 25 16:11:18 2022 +0800
f781746
riscv: dts: Sync important Unmatched pmic and qspi0 changes from Linux
by Jessica Clarke
· Fri Aug 12 18:50:03 2022 +0100
4150eec
riscv: ae350: Fix XIP config boot failure
by Leo Yu-Chi Liang
· Wed Jun 01 10:01:49 2022 +0800
66ae7fe
riscv: cpu: set gp before board_init_f_init_reserve
by Nikita Shubin
· Fri May 20 14:41:17 2022 +0300
8aaae3d
zynqmp: Run board_get_usable_ram_top() only on main U-Boot
by Ashok Reddy Soma
· Thu Jul 07 10:45:37 2022 +0200
c65d29f
arm: riscv: Remove additional ifdef from code guarded by CONFIG_IS_ENABLED
by Michal Simek
· Thu Jul 07 10:47:16 2022 +0200
94b4fec
Convert CONFIG_SYS_BOOT_RAMDISK_HIGH to Kconfig
by Tom Rini
· Sat Jun 25 11:02:46 2022 -0400
5a9095c
linker_lists: Rename sections to remove . prefix
by Andrew Scull
· Mon May 30 10:00:04 2022 +0000
4ddbade
Migrate CUSTOM_SYS_INIT_SP_ADDR to Kconfig using system-constants.h
by Tom Rini
· Wed May 25 12:16:03 2022 -0400
53a442a
riscv: Clean up asm/io.h
by Leo Yu-Chi Liang
· Thu May 19 16:43:31 2022 +0800
7a35171
riscv: remove CONFIG_ARCH_MAP_SYSMEM from io.h
by Michal Simek
· Wed May 18 12:54:01 2022 +0200
ea14390
riscv: alloc space exhausted
by Heinrich Schuchardt
· Tue Apr 05 16:47:15 2022 +0200
f4b4d75
riscv: provide missing base extension functions
by Heinrich Schuchardt
· Thu Mar 17 07:36:14 2022 +0100
295e1ce
cmd: sbi: add Performance Monitoring Unit Extension
by Heinrich Schuchardt
· Wed Mar 16 21:21:18 2022 +0100
9442f15
Merge tag 'v2022.04-rc5' into next
by Tom Rini
· Mon Mar 28 12:36:49 2022 -0400
5b845a4
k210: dts: align plic node with Linux
by Niklas Cassel
· Tue Mar 01 10:35:42 2022 +0000
b2c0bb4
k210: dts: align fpioa node with Linux
by Damien Le Moal
· Tue Mar 01 10:35:41 2022 +0000
0a876d7
k210: dts: add missing power bus clocks
by Damien Le Moal
· Tue Mar 01 10:35:40 2022 +0000
6e5a8b7
k210: use the board vendor name rather than the marketing name
by Damien Le Moal
· Tue Mar 01 10:35:39 2022 +0000
fc55736
event: Convert arch_cpu_init_dm() to use events
by Simon Glass
· Fri Mar 04 08:43:05 2022 -0700
c8481ef
dts: automatically build necessary .dtb files
by Rasmus Villemoes
· Mon Jan 10 14:34:41 2022 +0100
47b4c02
doc: replace @return by Return:
by Heinrich Schuchardt
· Wed Jan 19 18:05:50 2022 +0100
f263479
efi_loader: fix SectionAlignment, FileAlignment
by Heinrich Schuchardt
· Fri Jan 14 21:40:15 2022 +0100
f0106d4
riscv: revert Complete efi header for RV32/64
by Heinrich Schuchardt
· Sun Jan 09 18:16:11 2022 +0100
bd07fb4
riscv: qemu: Split devicetree files for qemu_riscv32/64
by Simon Glass
· Thu Dec 16 20:59:12 2021 -0700
9b9c4d5
riscv: Enable SPI flash env for SiFive Unmatched.
by Thomas Skibo
· Wed Nov 24 14:32:10 2021 -0800
f50fad6
riscv: Support booting SiFive Unmatched from SPI.
by Thomas Skibo
· Wed Nov 24 14:32:09 2021 -0800
b56e2fd
riscv: dts: Split Microchip device tree
by Padmarao Begari
· Wed Nov 17 18:21:17 2021 +0530
2f5b807
riscv: add #define in asm/io.h for some device drivers
by Wei Fu
· Sun Oct 24 00:31:12 2021 +0800
69c681e
riscv: function to retrieve SBI implementation version
by Heinrich Schuchardt
· Mon Oct 25 15:09:34 2021 +0200
579f12b
riscv: Avoid io read/write cause wrong result
by Nick Hu
· Mon Oct 18 11:50:05 2021 +0800
dc35df4
riscv: Remove OF_PRIOR_STAGE from RISC-V boards
by Ilias Apalodimas
· Tue Oct 12 00:00:13 2021 +0300
bedc439
fdtdec: Support reserved-memory flags
by Thierry Reding
· Fri Sep 03 15:16:21 2021 +0200
5e33691
fdtdec: Support compatible string list for reserved memory
by Thierry Reding
· Fri Sep 03 15:16:19 2021 +0200
85c057e
image: Drop IMAGE_ENABLE_OF_LIBFDT
by Simon Glass
· Sat Sep 25 19:43:21 2021 -0600
2795bf2
riscv: ae350: enable Coherence Manager for ae350
by Leo Yu-Chi Liang
· Thu Sep 23 10:34:29 2021 +0800
cc382ff
sysreset: provide SBI based sysreset driver
by Heinrich Schuchardt
· Sun Sep 12 21:11:46 2021 +0200
2d1c651
riscv: add missing SBI extension definitions
by Heinrich Schuchardt
· Sun Sep 12 21:11:44 2021 +0200
c7ad952
riscv: Fix setting no-map in reserved memory nodes
by Samuel Holland
· Sun Sep 12 11:05:47 2021 -0500
637fa28
lmb: riscv: Add arch_lmb_reserve()
by Marek Vasut
· Fri Sep 10 22:47:15 2021 +0200
17a2907
Merge tag 'v2021.10-rc4' into next
by Tom Rini
· Thu Sep 16 10:29:40 2021 -0400
b28d6b9
riscv: lib: modify the indent
by Zong Li
· Wed Sep 01 15:01:43 2021 +0800
ec34849
board: sifive: use ccache driver instead of helper function
by Zong Li
· Wed Sep 01 15:01:42 2021 +0800
c39544c
riscv: lib: implement enable_caches for sifive cache
by Zong Li
· Wed Sep 01 15:01:41 2021 +0800
a33070c
common: board_r: support enable_caches for RISC-V
by Zong Li
· Wed Sep 01 15:01:40 2021 +0800
79c6855
riscv: show code leading to exception
by Heinrich Schuchardt
· Sat Sep 04 10:36:49 2021 +0200
4b198e3
Kconfig: Remove all default n/no options
by Michal Simek
· Fri Aug 27 08:48:10 2021 +0200
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