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git01.mediatek.com / filogic / uboot / 8beb075db2c6e34b61a6ebab0e9ecef390c2334a / board / freescale / b4860qds / b4_pbi.cfg
  1. 04bfe20 board/b4860qds:Slow MDC clock to comply IEEE specs in PBI config by Prabhakar Kushwaha · Sat Mar 08 16:45:04 2014 +0530
  2. c9ed7bd powerpc/B4860: enable PBL tool for B4860 by Shaohui Xie · Sun Sep 22 09:56:02 2013 +0800