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uboot
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890f8ee7ef1957a56c59273bd5f7f16c2d5e3e6d
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drivers
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fpga
88d86ec
global: Migrate CONFIG_FPGA_DELAY to CFG
by Tom Rini
· Sun Dec 04 10:03:57 2022 -0500
fe8f39a
Convert CONFIG_SYS_FPGA_CHECK_BUSY to Kconfig
by Tom Rini
· Sun Dec 04 10:03:29 2022 -0500
6a5dccc
global: Move remaining CONFIG_SYS_* to CFG_SYS_*
by Tom Rini
· Wed Nov 16 13:10:41 2022 -0500
4b842e1
fpga: virtex2: Use logging feature instead of FPGA_DEBUG
by Alexander Dahl
· Fri Oct 07 14:20:03 2022 +0200
a151d23
fpga: spartan3: Use logging feature instead of FPGA_DEBUG
by Alexander Dahl
· Fri Oct 07 14:20:02 2022 +0200
cb9c1f9
fpga: spartan2: Use logging feature instead of FPGA_DEBUG
by Alexander Dahl
· Fri Oct 07 14:20:01 2022 +0200
7178d0e
fpga: ACEX1K: Use logging feature instead of FPGA_DEBUG
by Alexander Dahl
· Fri Oct 07 14:20:00 2022 +0200
e543b1b
fpga: cyclon2: Use logging feature instead of FPGA_DEBUG
by Alexander Dahl
· Fri Oct 07 14:19:59 2022 +0200
b9f41d5
fpga: altera: Use logging feature instead of FPGA_DEBUG
by Alexander Dahl
· Fri Oct 07 14:19:58 2022 +0200
300954e
fpga: virtex2: Fix printf format string warnings
by Alexander Dahl
· Fri Oct 07 14:19:57 2022 +0200
6e33dea
fpga: spartan3: Fix printf arguments warning
by Alexander Dahl
· Fri Oct 07 14:19:56 2022 +0200
907527b
fpga: spartan2: Fix printf arguments warning
by Alexander Dahl
· Fri Oct 07 14:19:55 2022 +0200
cad0381
fpga: Add missing Kconfig symbols for old FPGA drivers
by Alexander Dahl
· Fri Oct 07 14:19:54 2022 +0200
6ac319d
dm: fpga: Introduce new uclass
by Alexander Dahl
· Fri Sep 30 14:04:30 2022 +0200
bb7d3bb
treewide: Drop image_header_t typedef
by Simon Glass
· Tue Sep 06 20:26:52 2022 -0600
80877fa
cyclic: Use schedule() instead of WATCHDOG_RESET()
by Stefan Roese
· Fri Sep 02 14:10:46 2022 +0200
fb7fcc2
fpga: zynq: Remove post config info message for SPL
by Stefan Herbrechtsmeier
· Mon Aug 08 16:53:31 2022 +0200
0d6bb43
fpga: zynqmp: support loading encrypted bitfiles
by Adrian Fiergolski
· Fri Jul 22 17:16:14 2022 +0300
1777357
fpga: zynqmp: support loading authenticated images
by Oleksandr Suvorov
· Fri Jul 22 17:16:13 2022 +0300
f1c9a7e
fpga: zynqmp: add bitstream compatible checking
by Oleksandr Suvorov
· Fri Jul 22 17:16:12 2022 +0300
fd4c272
fpga: zynqmp: reduce zynqmppl_load() code
by Oleksandr Suvorov
· Fri Jul 22 17:16:11 2022 +0300
c0806cc
fpga: xilinx: pass compatible flags to load() callback
by Oleksandr Suvorov
· Fri Jul 22 17:16:10 2022 +0300
a4d9593
fpga: add fpga_compatible2flag
by Oleksandr Suvorov
· Fri Jul 22 17:16:08 2022 +0300
4ff163d
fpga: pass compatible flags to fpga_load()
by Oleksandr Suvorov
· Fri Jul 22 17:16:07 2022 +0300
5055cf2
fpga: xilinx: pass compatible flags to xilinx_load()
by Oleksandr Suvorov
· Fri Jul 22 17:16:06 2022 +0300
60ae6c1
fpga: zynqmp: add str2flags call
by Oleksandr Suvorov
· Fri Jul 22 17:16:05 2022 +0300
fbe31bb
fpga: add option for loading FPGA secure bitstreams
by Oleksandr Suvorov
· Fri Jul 22 17:16:02 2022 +0300
0c46047
fpga: Convert SYS_FPGA_PROG_FEEDBACK to Kconfig
by Alexander Dahl
· Thu Jul 21 15:31:22 2022 +0200
428a8c6
fpga: Convert SYS_FPGA_CHECK_CTRLC to Kconfig
by Alexander Dahl
· Thu Jul 21 15:31:21 2022 +0200
89b5381
Merge branch 'next'
by Tom Rini
· Mon Jul 11 10:18:13 2022 -0400
c23ad84
socfpga: arria10: Wait for fifo empty after writing bitstream
by Paweł Anikiel
· Fri Jun 17 12:47:25 2022 +0200
af526e6
socfpga: arria10: Improve bitstream loading speed
by Paweł Anikiel
· Fri Jun 17 12:47:24 2022 +0200
d1ad817
Convert CONFIG_FPGA_STRATIX_V to Kconfig
by Tom Rini
· Sun Jun 12 20:02:00 2022 -0400
adc079f
arm: socfpga: arria10: Enable double peripheral RBF configuration
by Tien Fong Chee
· Sun Nov 07 23:08:56 2021 +0800
3fd6633
WS cleanup: remove trailing empty lines
by Wolfgang Denk
· Mon Sep 27 17:42:36 2021 +0200
8a71416
arm: socfpga: Move Stratix10 and Agilex to use TARGET_SOCFPGA_SOC64
by Siew Chin Lim
· Mon Mar 01 20:04:10 2021 +0800
df070ce
Merge tag 'xilinx-for-v2021.04-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze
by Tom Rini
· Tue Feb 23 10:45:55 2021 -0500
36eca7c
fpga: zynqpl: fix buffer alignment
by Michael Walle
· Wed Feb 10 22:42:29 2021 +0100
d563c25
image: Adjust the workings of fit_check_format()
by Simon Glass
· Mon Feb 15 17:08:09 2021 -0700
3ba929a
common: Drop asm/global_data.h from common header
by Simon Glass
· Fri Oct 30 21:38:53 2020 -0600
ec4c679
arm: socfpga: soc64: Add ATF support for FPGA reconfig driver
by Chee Hong Ang
· Thu Dec 24 18:21:07 2020 +0800
89ac34d
arm: socfpga: agilex: Enable FPGA Full Reconfiguration support
by Chee Hong Ang
· Fri Aug 07 11:50:05 2020 +0800
4e87fcd
fpga: intel_sdm_mb: Add watchdog reset
by Chee Hong Ang
· Fri Aug 07 11:50:04 2020 +0800
1419245
fpga: altera: Rename Stratix10 FPGA to Intel FPGA SDM Mailbox
by Chee Hong Ang
· Fri Aug 07 11:50:03 2020 +0800
cd70834
fpga: zynqmp: Protect zynqmp_loads() for SPL
by Michal Simek
· Thu Sep 10 12:57:16 2020 +0200
74076ba
fpga: zynqmp: Get rid of ZYNQMP_SIP_SVC* macros
by Michal Simek
· Wed Sep 09 13:25:40 2020 +0200
0768aeb
xilinx: zynqmp: synchronize firmware call return payload
by Ibai Erkiaga
· Tue Aug 04 23:17:26 2020 +0100
ef8a4e6
fs: fs-loader: Drop dm.h header file
by Simon Glass
· Sun Jul 19 10:15:38 2020 -0600
274410a
arm64: xilinx: Print fpga error value in hex
by T Karthik Reddy
· Thu May 14 07:49:36 2020 -0600
1fa7cbe
fpga: zynqpl: Flush dcache only for non-bitstream data
by T Karthik Reddy
· Tue Mar 12 20:20:23 2019 +0530
59d9ab7
fpga: zynqpl: Check if aes engine is enabled
by Ibai Erkiaga
· Thu Apr 05 05:19:27 2018 -0700
f3b078f
fpga: zynqpl: Check fpga config completion
by T Karthik Reddy
· Tue Mar 12 20:20:20 2019 +0530
c575058
fpga: zynqpl: Correct PL bitstream loading sequence for zynqaes
by Siva Durga Prasad Paladugu
· Wed Dec 09 18:46:43 2015 +0530
4dcacfc
common: Drop linux/bitops.h from common header
by Simon Glass
· Sun May 10 11:40:13 2020 -0600
dbd7954
common: Drop linux/delay.h from common header
by Simon Glass
· Sun May 10 11:40:11 2020 -0600
0db4b94
Fix some checkpatch warnings in calls to udelay()
by Simon Glass
· Sun May 10 11:40:10 2020 -0600
0f2af88
common: Drop log.h from common header
by Simon Glass
· Sun May 10 11:40:05 2020 -0600
9758973
common: Drop init.h from common header
by Simon Glass
· Sun May 10 11:40:02 2020 -0600
2dc9c34
common: Drop image.h from common header
by Simon Glass
· Sun May 10 11:40:01 2020 -0600
274e0b0
common: Drop net.h from common header
by Simon Glass
· Sun May 10 11:39:56 2020 -0600
9bc1564
dm: core: Create a new header file for 'compat' features
by Simon Glass
· Mon Feb 03 07:36:16 2020 -0700
3d3a860
arm: socfpga: Convert system manager from struct to defines
by Ley Foon Tan
· Fri Nov 08 10:38:20 2019 +0800
6333448
common: Move ARM cache operations out of common.h
by Simon Glass
· Thu Nov 14 12:57:39 2019 -0700
1d91ba7
common: Move some cache and MMU functions out of common.h
by Simon Glass
· Thu Nov 14 12:57:37 2019 -0700
4c3de37
arm64: zynqmp: Convert invoke_smc() to xilinx_pm_request()
by Michal Simek
· Fri Oct 04 15:35:45 2019 +0200
142fb5b
arm64: versal: Rename versal_pm_request to xilinx_pm_request
by Michal Simek
· Fri Oct 04 15:52:43 2019 +0200
81efd2a
arm64: xilinx: Move firmware functions from platform to driver
by Michal Simek
· Fri Oct 04 15:45:29 2019 +0200
6aa5bc8
arm64: zynqmp: use firmware driver to get version
by Ibai Erkiaga
· Fri Sep 27 11:37:02 2019 +0100
c8a3efa
firmware: zynqmp: create firmware header
by Ibai Erkiaga
· Fri Sep 27 11:37:01 2019 +0100
2712114
fpga: zynqmp: Fix second local variable declaration
by Michal Simek
· Fri Aug 02 12:43:29 2019 +0200
b739897
arm64: versal: fpga: Add PL bit stream load support
by Siva Durga Prasad Paladugu
· Mon Aug 05 15:54:59 2019 +0530
d52678c
fpga: altera: cyclon2: Check function pointer before calling
by Alexander Dahl
· Fri Jun 28 14:41:23 2019 +0200
a8da71c
fpga: altera: cyclon2: Fix indentation
by Alexander Dahl
· Fri Jun 28 14:41:22 2019 +0200
246bc02
fpga: altera: cyclon2: Fix most checkpatch warnings
by Alexander Dahl
· Fri Jun 28 14:41:21 2019 +0200
0b88834
fpga: virtex2: Add slave serial programming support
by Robert Hancock
· Tue Jun 18 09:47:16 2019 -0600
7b5140c
fpga: virtex2: Add additional clock cycles after DONE assertion
by Robert Hancock
· Tue Jun 18 09:47:15 2019 -0600
8a7d663
fpga: virtex2: Split out image writing from pre/post operations
by Robert Hancock
· Tue Jun 18 09:47:14 2019 -0600
be7f746
fpga: virtex2: added Kconfig option
by Robert Hancock
· Tue Jun 18 09:47:13 2019 -0600
19b55dc
fpga: virtex2: cosmetic: Cleanup code style
by Robert Hancock
· Tue Jun 18 09:47:12 2019 -0600
0e13e5f
fpga: arria10: Fix error in fpga pin configuration
by Dalon Westergreen
· Tue Jul 16 09:28:10 2019 -0700
fe03d80
spl: socfpga: Implement fpga bitstream loading with socfpga loadfs
by Tien Fong Chee
· Tue May 07 17:42:30 2019 +0800
ca99a8a
ARM: socfpga: Add FPGA drivers for Arria 10 FPGA bitstream loading
by Tien Fong Chee
· Tue May 07 17:42:28 2019 +0800
725b122
ARM: socfpga: Moving the watchdog reset to the for-loop status polling
by Tien Fong Chee
· Tue May 07 17:42:27 2019 +0800
7f3dace
ARM: socfpga: Cleaning up and ensuring consistent format messages in driver
by Tien Fong Chee
· Tue May 07 17:42:26 2019 +0800
9bf652d
arm: zynq: Add an info message about post config
by Siva Durga Prasad Paladugu
· Sat Mar 23 16:01:36 2019 +0530
3b45f6b
fpga: Replace char * with const char * for filename
by Tien Fong Chee
· Fri Feb 15 15:57:07 2019 +0800
c4192f7
ARM: socfpga: stratix10: Return valid error code from FPGA driver
by Ang, Chee Hong
· Sun Feb 17 20:07:50 2019 -0800
add7f41d
fpga: zynqmp: show an error message when FPGA programming fails
by Luca Ceresoli
· Fri Jan 11 17:09:45 2019 +0100
ff14f16
arm: socfpga: stratix10: Add Stratix10 FPGA into FPGA device table
by Ang, Chee Hong
· Wed Dec 19 18:35:15 2018 -0800
dcc3bb6
arm: socfpga: stratix10: Add Stratix 10 FPGA Reconfiguration Driver
by Ang, Chee Hong
· Wed Dec 19 18:35:14 2018 -0800
4003448
arm: socfpga: fpga: fix type of local variable
by Simon Goldschmidt
· Mon Oct 15 20:35:10 2018 +0200
62fe313
fpga: zynqmp: Modify PL bitstream loading sequence
by Siva Durga Prasad Paladugu
· Tue Aug 21 15:44:50 2018 +0530
55af55a
fpga: Kconfig: Replace spaces with tabs
by Michal Simek
· Mon Jul 23 15:59:55 2018 +0200
4397602
drivers: fpga: zynqpl: fix compilation with SPL
by Luis Araneda
· Thu Jul 19 03:10:17 2018 -0400
e460352
xilinx: zynq: Add support to secure images
by Siva Durga Prasad Paladugu
· Tue Jun 26 15:02:19 2018 +0530
6809e81
fpga: zynqmp: Add secure bitstream loading for ZynqMP
by Siva Durga Prasad Paladugu
· Thu May 31 15:10:23 2018 +0530
cce0cb0
cmd: fpga: Add support to load secure bitstreams
by Siva Durga Prasad Paladugu
· Thu May 31 15:10:22 2018 +0530
10e4779
SPDX: Convert all of our single license tags to Linux Kernel style
by Tom Rini
· Sun May 06 17:58:06 2018 -0400
bdfb5c4
Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR
by Tom Rini
· Wed Apr 18 13:50:47 2018 -0400
2c0f3ae
arm: socfpga: Fix with the correct polling on bit is set
by Tien Fong Chee
· Tue Dec 05 15:57:58 2017 +0800
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