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git01.mediatek.com / filogic / uboot / 890f8ee7ef1957a56c59273bd5f7f16c2d5e3e6d / drivers / clk / renesas / r8a774a1-cpg-mssr.c
  1. 814217e clk: renesas: Make reset controller modemr register offset configurable by Marek Vasut · Sun Apr 25 21:53:05 2021 +0200
  2. 8538d53 clk: renesas: Synchronize RZ/G2 tables with Linux 5.12 by Marek Vasut · Sun Apr 25 21:08:18 2021 +0200
  3. 8a2b47f dm: treewide: Rename auto_alloc_size members to be shorter by Simon Glass · Thu Dec 03 16:55:17 2020 -0700
  4. 161bf54 clk: renesas: r8a774a1-cpg-mssr: Add R8A774A1 RPC clock by Biju Das · Tue Sep 29 11:09:44 2020 +0100
  5. 06c4f9b clk: renesas: Add R8A774A1 clock tables by Adam Ford · Tue Jun 30 09:30:08 2020 -0500