Gitiles
Code Review
Sign In
git01.mediatek.com
/
filogic
/
uboot
/
882b2a4f9a2f811eb14124b4ba7df7cfbf2ab3bb
/
drivers
/
clk
b4be5ca
rockchip: rk3188: init CPU freq in clock driver
by Kever Yang
· Mon Jul 22 19:59:13 2019 +0800
3d23abd
clk: initialize clk->data when using default xlate
by Sekhar Nori
· Thu Jul 11 14:30:24 2019 +0530
c6b05de
Merge tag 'u-boot-stm32-20190723' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm
by Tom Rini
· Tue Jul 23 14:16:21 2019 -0400
03d87aa
clk: stm32mp1: Add RTC clock entry
by Patrick Delaunay
· Thu Jul 11 12:03:37 2019 +0200
c498923
Merge tag 'rockchip-for-v2019.07' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip
by Tom Rini
· Sun Jul 21 15:40:21 2019 -0400
f0b0631
clk: rockchip: rk3399: Set 400MHz ddr clock
by Jagan Teki
· Tue Jul 16 17:27:36 2019 +0530
4833f32
clk: rockchip: rk3399: Set 50MHz ddr clock
by Jagan Teki
· Tue Jul 16 17:27:35 2019 +0530
6e9ff1a
clk: sifive: Drop GEMGXL clock driver
by Anup Patel
· Tue Jun 25 06:31:30 2019 +0000
9a99add
clk: sifive: Sync-up main driver with upstream Linux
by Anup Patel
· Tue Jun 25 06:31:21 2019 +0000
83d5b50
clk: sifive: Sync-up DT bindings header with upstream Linux
by Anup Patel
· Tue Jun 25 06:31:15 2019 +0000
6f7b5a2
clk: sifive: Sync-up WRPLL library with upstream Linux
by Anup Patel
· Tue Jun 25 06:31:08 2019 +0000
00a156d
clk: sifive: Factor-out PLL library as separate module
by Anup Patel
· Tue Jun 25 06:31:02 2019 +0000
bef02a3
clk: rockchip: rk3399: Fix check patch warnings and checks
by Jagan Teki
· Mon Jul 15 23:51:10 2019 +0530
ae58935
rockchip: clk: rk3399: handle clk_enable requests for USB3
by Mark Kettenis
· Sun Jun 30 18:01:53 2019 +0200
ef0e43f
Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-sunxi
by Tom Rini
· Tue Jul 16 11:19:31 2019 -0400
60e6efd
sunxi: clocks: Add H6 USB clock gates and resets
by Andre Przywara
· Sun Jun 23 15:09:48 2019 +0100
31e872e
Merge tag 'u-boot-stm32-20190712' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm
by Tom Rini
· Sun Jul 14 09:09:49 2019 -0400
942ee23
clk: clk_stm32mp1: Fix warnings when compiling with W=1
by Patrick Delaunay
· Fri Jun 21 15:26:48 2019 +0200
82b88ef
stm32mp1: syscon: remove stgen
by Patrick Delaunay
· Fri Jul 05 17:20:11 2019 +0200
ec4f6ba
clk: uniphier: add EMMC clock for LD11, LD20, and PXs3
by Masahiro Yamada
· Wed Jul 10 20:07:35 2019 +0900
0fda700
Merge tag 'u-boot-stm32-20190606' of https://github.com/pchotard/u-boot
by Tom Rini
· Tue Jun 11 17:22:22 2019 -0400
62eb818
clk: imx8qm: fix usdhc2 clocks
by Marcel Ziswiler
· Fri May 31 19:00:17 2019 +0300
5bfc870
stm32mp1: clk: use the correct identifier for ethck
by Patrick Delaunay
· Fri May 17 15:08:42 2019 +0200
08ca06b
clk: stm32mp1: Add SPI1 clock entry
by Patrice Chotard
· Tue Apr 30 18:08:27 2019 +0200
eb195bd
clk: sifive: Add clock driver for GEMGXL MGMT
by Bin Meng
· Wed May 22 00:09:44 2019 -0700
5d063d8
Merge tag 'rockchip-for-v2019.07-rc3' of git://git.denx.de/u-boot-rockchip
by Tom Rini
· Fri May 31 07:17:09 2019 -0400
fd6574e
clk: meson-g12a: Add PCIE PLL support
by Neil Armstrong
· Tue May 28 10:50:37 2019 +0200
e5607a0
rockchip: clk: rk3399: allow requests for all UART clocks
by Christoph Muellner
· Tue May 07 10:58:44 2019 +0200
854c59e
clk: stm32mp1: add set_rate for DDRPHYC clock
by Patrick Delaunay
· Thu Apr 18 17:32:48 2019 +0200
af9d45d
mpc83xx_clk: Add enable method
by Mario Six
· Mon Jan 28 09:40:36 2019 +0100
ebe750b
Merge tag 'rockchip-for-v2019.07-rc1' of git://git.denx.de/u-boot-rockchip
by Tom Rini
· Thu May 09 07:12:51 2019 -0400
19bbb32
Merge branch 'master' of git://git.denx.de/u-boot-sunxi
by Tom Rini
· Wed May 08 16:21:43 2019 -0400
a77add3
clk: Use clk_get_by_index_tail()
by Jagan Teki
· Thu Feb 28 00:26:53 2019 +0530
fc7c7ce
clk: Get the CLK by index without device
by Jagan Teki
· Thu Feb 28 00:26:52 2019 +0530
72be986
clk: sifive: fu540-prci: Change include order
by Jagan Teki
· Wed May 08 19:52:18 2019 +0530
55fabb3
rockchip: clk: rk322x: fix assert clock value
by Kever Yang
· Tue Apr 02 20:41:23 2019 +0800
6220741
rockchip: rk322x: add CLK_EMMC_SAMPLE clock support
by Kever Yang
· Tue Apr 02 20:41:22 2019 +0800
544f9de
Merge tag 'rockchip-for-2019.07' of git://git.denx.de/u-boot-rockchip
by Tom Rini
· Wed May 01 11:52:04 2019 -0400
dd6f126
Merge tag 'u-boot-imx-20190426' of git://git.denx.de/u-boot-imx
by Tom Rini
· Tue Apr 30 23:21:27 2019 -0400
9fbe17c
rockchip: use 'arch-rockchip' as header file path
by Kever Yang
· Thu Mar 28 11:01:23 2019 +0800
9a0dc91
clk: imx8: add i.MX8QM clk driver
by Peng Fan
· Tue Mar 05 02:32:35 2019 +0000
6a8e5f9
clk: imx8: split code into common and soc specific part
by Peng Fan
· Tue Mar 05 02:32:33 2019 +0000
e59d7eb
Merge tag 'u-boot-amlogic-20190423' of git://git.denx.de/u-boot-amlogic
by Tom Rini
· Wed Apr 24 12:26:25 2019 -0400
1fe5ad0
clk: mediatek: add driver for MT8516
by Fabien Parent
· Sun Mar 24 16:46:36 2019 +0100
69463e5
clk: mediatek: add support for SETCLR_INV and NO_SETCLR flags
by Fabien Parent
· Sun Mar 24 16:46:35 2019 +0100
d03f5f0
clk: meson: add g12a support
by Jerome Brunet
· Mon Feb 11 16:45:01 2019 +0100
3da39a8
clk: create meson directory and move related drivers
by Jerome Brunet
· Sun Feb 10 14:54:30 2019 +0100
315ac0f
Merge branch 'master' of git://git.denx.de/u-boot-sunxi
by Tom Rini
· Wed Apr 17 09:19:45 2019 -0400
fc22820
clk: sunxi: r40: Fix GMAC reset reg offset
by Jagan Teki
· Mon Apr 15 16:42:16 2019 +0530
c5d9879
ARM: zynq: Add missing i2c get_rate for fixing i2c SPL
by Hannes Schmelzer
· Thu Feb 14 08:54:42 2019 +0100
8540b63
Merge tag 'pull-12apr19' of git://git.denx.de/u-boot-dm
by Tom Rini
· Sat Apr 13 08:27:35 2019 -0400
5f6830d
Merge tag 'u-boot-stm32-20190412' of https://github.com/patrickdelaunay/u-boot
by Tom Rini
· Fri Apr 12 15:43:19 2019 -0400
5d06141
stm32mp1: add trusted boot with TF-A
by Patrick Delaunay
· Tue Feb 12 11:44:39 2019 +0100
acdb7af
clk: socfpga: replace dm_fdt_pre_reloc by dm_ofnode_pre_reloc
by Patrick Delaunay
· Wed Mar 20 18:21:25 2019 +0100
f656ba8
clk: at91: replace dm_fdt_pre_reloc by dm_ofnode_pre_reloc
by Patrick Delaunay
· Wed Mar 20 18:21:24 2019 +0100
7841483
clk: renesas: Synchronize Gen3 tables with Linux 5.0
by Marek Vasut
· Mon Mar 04 21:38:10 2019 +0100
3bee488
clk: renesas: Synchronize Gen2 tables with Linux 5.0
by Marek Vasut
· Mon Mar 04 21:23:25 2019 +0100
98c2058
clk: renesas: Add R8A77965 clock tables
by Marek Vasut
· Mon Mar 04 13:36:13 2019 +0100
53698b2
clk: sunxi: a10: Add CLK_AHB_GMAC
by Jagan Teki
· Thu Mar 28 13:46:11 2019 +0530
0f6aa07
clk: renesas: Add support for setting MMCIF clock divider on Gen2
by Marek Vasut
· Mon Mar 18 06:04:02 2019 +0100
31872db
clk: renesas: Fix swapped div and mul in debug output on Gen2
by Marek Vasut
· Mon Mar 18 05:38:08 2019 +0100
272daa7
clk: renesas: Fix SDH clock divider decoding on Gen2
by Marek Vasut
· Mon Mar 18 05:11:42 2019 +0100
755e181
clk: sunxi: h3: Implement EPHY CLK and RESET
by Jagan Teki
· Thu Feb 28 00:26:59 2019 +0530
836631b
clk: sunxi: Implement EMAC, GMAC clocks, resets
by Jagan Teki
· Thu Feb 28 00:26:57 2019 +0530
f4b29f4
clk: sunxi: Implement A10 EMAC clocks
by Jagan Teki
· Thu Feb 28 00:26:49 2019 +0530
bc12313
clk: sunxi: Implement SPI clocks, resets
by Jagan Teki
· Wed Feb 27 20:02:06 2019 +0530
412f604
Merge branch 'master' of git://git.denx.de/u-boot-sh
by Tom Rini
· Thu Feb 28 18:57:17 2019 -0500
8d28c3c
clk: Add fixed-factor clock driver
by Anup Patel
· Mon Feb 25 08:14:55 2019 +0000
42fdf08
clk: Add SiFive FU540 PRCI clock driver
by Anup Patel
· Mon Feb 25 08:14:49 2019 +0000
d0bb61b
clk: rmobile: Drop def_bool per SoC
by Marek Vasut
· Mon Feb 18 13:22:47 2019 +0100
9a6ce2a
clk: stm32mp1: correctly handle Clock Spreading Generator
by Patrick Delaunay
· Wed Jan 30 13:07:06 2019 +0100
e8d836c
clk: stm32mp1: add debug information
by Patrick Delaunay
· Wed Jan 30 13:07:04 2019 +0100
45e5da5
clk: stm32mp1: recalculate counter when switching freq
by Patrick Delaunay
· Wed Jan 30 13:07:03 2019 +0100
f5aaa07
clk: stm32mp1: correct access to RCC_OCENSETR/RCC_OCENCLRR
by Patrick Delaunay
· Wed Jan 30 13:07:02 2019 +0100
629f44f
clk: stm32mp1: add IPCC clock
by Patrick Delaunay
· Wed Jan 30 13:07:01 2019 +0100
7b72653
clk: stm32mp1: no more get ck_usbo_48m in device tree
by Patrick Delaunay
· Wed Jan 30 13:07:00 2019 +0100
d27b317
rockchip: clk: Add mention of four new clocks
by Simon Glass
· Mon Jan 21 14:53:30 2019 -0700
3336373
clk: Improve debug message in clk_set_default_rates()
by Simon Glass
· Mon Jan 21 14:53:19 2019 -0700
cf6741b
rockchip: rk3288: Add i2s pinctrl and clock support
by Simon Glass
· Thu Dec 27 20:15:20 2018 -0700
030bab8
sunxi: clk: enable clk and reset for CCU devices
by Andre Przywara
· Tue Jan 29 15:54:08 2019 +0000
8c8c8a4
sunxi: clk: A80: add MMC clock support
by Andre Przywara
· Tue Jan 29 15:54:10 2019 +0000
ddf33c1
sunxi: clk: add MMC gates/resets
by Andre Przywara
· Tue Jan 29 15:54:09 2019 +0000
e366a0c
clk: sunxi: Add Allwinner A80 CLK driver
by Jagan Teki
· Fri Jan 11 15:41:46 2019 +0530
5bc16d2
clk: sunxi: Add Allwinner H6 CLK driver
by Jagan Teki
· Mon Dec 31 15:35:01 2018 +0530
b490aa5
clk: sunxi: Implement UART resets
by Jagan Teki
· Sun Dec 30 21:37:31 2018 +0530
8cf08ea
clk: sunxi: Implement UART clocks
by Jagan Teki
· Sun Dec 30 21:29:24 2018 +0530
d69bf0b
clk: sunxi: Add Allwinner V3S CLK driver
by Jagan Teki
· Sun Aug 05 14:31:54 2018 +0530
66c07fd
clk: sunxi: Add Allwinner R40 CLK driver
by Jagan Teki
· Sun Aug 05 11:16:33 2018 +0530
2474033
clk: sunxi: Add Allwinner A83T CLK driver
by Jagan Teki
· Thu Aug 02 23:33:55 2018 +0530
885abd8
clk: sunxi: Add Allwinner A23/A33 CLK driver
by Jagan Teki
· Thu Aug 02 23:25:03 2018 +0530
438e8f6
clk: sunxi: Add Allwinner A31 CLK driver
by Jagan Teki
· Thu Aug 02 23:15:34 2018 +0530
0c16029
clk: sunxi: Add Allwinner A10s/A13 CLK driver
by Jagan Teki
· Thu Aug 02 19:54:26 2018 +0530
b38f7af
clk: sunxi: Add Allwinner A10/A20 CLK driver
by Jagan Teki
· Thu Aug 02 16:52:37 2018 +0530
2ee11ff
clk: sunxi: Add Allwinner H3/H5 CLK driver
by Jagan Teki
· Thu Aug 02 15:43:02 2018 +0530
7f6c2a8
reset: Add Allwinner RESET driver
by Jagan Teki
· Fri Jan 18 22:18:13 2019 +0530
1d150b4
clk: Add Allwinner A64 CLK driver
by Jagan Teki
· Sat Dec 22 21:32:49 2018 +0530
0225945
clk: MediaTek: bind ethsys reset controller
by developer
· Thu Dec 20 16:12:52 2018 +0800
5659e33
clk: imx8: fix build warning
by Peng Fan
· Sat Dec 15 12:19:46 2018 +0000
cdc6f65
clk: uniphier: add NAND 200MHz clock
by Masahiro Yamada
· Wed Dec 19 20:03:20 2018 +0900
3247081
clk: stm32: add hardware spinlock clock
by Benjamin Gaignard
· Tue Nov 27 13:49:51 2018 +0100
Next »