| commit | 9a6ce2a8ee9b8579409cc3b6da7ee7709dc8bf8e | [log] [tgz] |
|---|---|---|
| author | Patrick Delaunay <patrick.delaunay@st.com> | Wed Jan 30 13:07:06 2019 +0100 |
| committer | Tom Rini <trini@konsulko.com> | Sat Feb 09 07:50:57 2019 -0500 |
| tree | 3324114ed3c850227bebde0f28d258b303028b50 | |
| parent | 0c220e0b506f0ee51e0732ef729404e3b2559bd0 [diff] |
clk: stm32mp1: correctly handle Clock Spreading Generator To activate the csg option, the driver need to set the bit2 of PLLNCR register = SSCG_CTRL: Spread Spectrum Clock Generator of PLLn enable. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>