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filogic
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uboot
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81e1042dbf3969e6da76a177f1306850285b7aea
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arch
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arm
/
mach-tegra
/
tegra210
81e1042
treewide: replace with error() with pr_err()
by Masahiro Yamada
· 7 years ago
cf0c6e2
dm: tegra: Convert USB setup to livetree
by Simon Glass
· 7 years ago
22d567e
Kconfig: Migrate BOARD_LATE_INIT to a select
by Tom Rini
· 8 years ago
532543c
ARM: tegra: add APIs the clock uclass driver will need
by Stephen Warren
· 8 years ago
1453d10
ARM: tegra: add peripheral clock init table
by Stephen Warren
· 8 years ago
b6409f2
ARM: tegra210: set PLLE_PTS bit when enabling PLLE
by Stephen Warren
· 9 years ago
7f75d54
ARM: tegra: note that p2371-2180 is Jetson TX1
by Stephen Warren
· 9 years ago
6f6ed1b
ARM: tegra: error check Tegra210 XUSB padctl waits
by Stephen Warren
· 9 years ago
e3ba569
ARM: tegra: add lane tables to Tegra210 XUSB padctl
by Stephen Warren
· 9 years ago
7de245d
ARM: tegra: switch Tegra210 to common XUSB padctl
by Stephen Warren
· 9 years ago
553b61e
ARM: tegra210: implement PLLE init procedure from TRM
by Stephen Warren
· 9 years ago
4c3aaa7
ARM: tegra: clk_m is the architected timer source clock
by Thierry Reding
· 9 years ago
fa6e24d
ARM: tegra: Implement clk_m
by Thierry Reding
· 9 years ago
8681561
ARM: tegra: Add p2371-2180 board
by Stephen Warren
· 9 years ago
b6ba3fb
tegra: Correct logic for reading pll_misc in clock_start_pll()
by Simon Glass
· 9 years ago
952a573
ARM: tegra: Add p2371-0000 board
by Stephen Warren
· 9 years ago
1b54a5e
ARM: tegra: Add e2220-1170 board
by Stephen Warren
· 9 years ago
a8480ef
Tegra: PLL: use per-SoC pllinfo table instead of PLL_DIVM/N/P, etc.
by Tom Warren
· 9 years ago
27bce71
Tegra: clocks: Add 38.4MHz OSC support for T210 use
by Tom Warren
· 9 years ago
22425c9
T210: Add support for 64-bit T210-based P2571 board
by Tom Warren
· 10 years ago
f80dd82
ARM: Tegra210: Add SoC code/include files for T210
by Tom Warren
· 10 years ago
f55fdec
ARM: tegra: pinctrl: move Tegra210 code to the correct dir
by Stephen Warren
· 10 years ago