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git01.mediatek.com / filogic / uboot / 7d2757f71e9420b3398a0e9bc3a907b6440e5e65 / arch / arm / mach-sunxi / dram_sunxi_dw.c
  1. c3391f6 sunxi: enable dual rank memory on R40 by Icenowy Zheng · 3 years, 9 months ago
  2. 9e9b073 sunxi: support asymmetric dual rank DRAM on A64/R40 by Icenowy Zheng · 3 years, 9 months ago
  3. aff2d3a sunxi: make V3s DRAM initialization more proper by Icenowy Zheng · 4 years, 1 month ago
  4. a1dba89 sunxi: Silence warning about non-static inline function by Samuel Holland · 4 years, 7 months ago
  5. dbd7954 common: Drop linux/delay.h from common header by Simon Glass · 4 years, 7 months ago
  6. 0f2af88 common: Drop log.h from common header by Simon Glass · 4 years, 7 months ago
  7. 9758973 common: Drop init.h from common header by Simon Glass · 4 years, 7 months ago
  8. 10e4779 SPDX: Convert all of our single license tags to Linux Kernel style by Tom Rini · 7 years ago
  9. 3c1b9f1 sunxi: add LPDDR3 DRAM type support for DesignWare-like DRAM controller by Icenowy Zheng · 7 years ago
  10. fe05217 sunxi: add support for V3s DRAM controller by Icenowy Zheng · 7 years ago
  11. e270a58 sunxi: add support for the DDR2 in V3s SoC by Icenowy Zheng · 7 years ago
  12. 8804877 sunxi: enable dual rank detection in DesignWare-like DRAM code by Icenowy Zheng · 7 years ago
  13. f09b48e sunxi: Add selective DRAM type and timing by Icenowy Zheng · 7 years ago
  14. 2002035 sunxi: add bank detection code to H3 DRAM initialization code by Icenowy Zheng · 7 years ago
  15. b260751 sunxi: add option for 16-bit DW DRAM controller by Icenowy Zheng · 7 years ago
  16. 4323a8f sunxi: Rename bus-width related macros in H3 DRAM code by Icenowy Zheng · 7 years ago
  17. ca0bc02 sunxi: makes an invisible option for H3-like DRAM controllers by Icenowy Zheng · 7 years ago[Renamed from arch/arm/mach-sunxi/dram_sun8i_h3.c]
  18. 143ef79 sunxi: Use H3/A64 DRAM initialization code for R40 by Chen-Yu Tsai · 8 years ago
  19. 5d0d28f sunxi: DRAM: add Allwinner H5 support by Andre Przywara · 8 years ago
  20. d414c38 sunxi: DRAM: fix H3 DRAM size display on aarch64 by Andre Przywara · 8 years ago
  21. c98f5cc sunxi: H3/A64: fix non-ODT setting by Andre Przywara · 8 years ago
  22. f613817 sunxi: A64: use H3 DRAM initialization code for A64 as well by Jens Kuske · 8 years ago
  23. 8bbadc8 sunxi: H3: add DRAM controller single bit delay support by Jens Kuske · 8 years ago
  24. 3e79758 sunxi: H3: add and rename some DRAM contoller registers by Jens Kuske · 8 years ago
  25. 3c31ba9 sunxi: H3: Rework MBUS priority setup by Philipp Tomsich · 8 years ago
  26. d8b9593 sunxi: Fix H3 DRAM impedance calibration on rev. A chips by Jens Kuske · 8 years ago
  27. 8dd84a7 sunxi: Move cpu independent code to mach directory by Alexander Graf · 9 years ago[Renamed from arch/arm/cpu/armv7/sunxi/dram_sun8i_h3.c]
  28. af272a1 sunxi: Fix H3 DRAM DQ read delay configuration by Jens Kuske · 9 years ago
  29. 53f018e sunxi: Add H3 DRAM initialization support by Jens Kuske · 9 years ago