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git01.mediatek.com / filogic / uboot / 6ec97d2ea4f105068ce4d553692e10399695ca26 / arch / arm / mach-omap2 / omap5 / sdram.c
  1. 28eec37 arm: Introduce arch/arm/mach-omap2 for OMAP2 derivative platforms by Tom Rini · Mon Nov 07 21:34:54 2016 -0500[Renamed from arch/arm/cpu/armv7/omap5/sdram.c]
  2. 9148fa9 ARM: DRA72: sdram: Update sdram ext phy configuration for SR2.0 by Nishanth Menon · Tue Mar 15 18:09:13 2016 -0500
  3. af9af44 ARM: DRA72x: Add support for detection of SR2.0 by Ravi Babu · Tue Mar 15 18:09:11 2016 -0500
  4. 41963ee ARM: DRA7: Move emif settings to board specific files by Lokesh Vutla · Tue Mar 08 09:18:06 2016 +0530
  5. a3019e0 ARM: DRA7: emif: Check for enable bits before updating leveling output by Lokesh Vutla · Sat Mar 05 17:32:30 2016 +0530
  6. 4de1668 ARM: DRA7: Add detection of ES2.0 by Nishanth Menon · Thu Aug 13 09:50:58 2015 -0500
  7. 644b4da ARM: DRA7xx: EMIF: Fix DLL_CALIB_CTRL register by Lokesh Vutla · Wed Jun 03 16:57:47 2015 +0530
  8. 7adac4a ARM: DRA72-evm: Enable HW leveling by Lokesh Vutla · Wed Jun 03 14:43:24 2015 +0530
  9. bf6aeab ARM: DRA7-evm: Enable HW leveling by Lokesh Vutla · Wed Jun 03 14:43:23 2015 +0530
  10. 979d2c3 ARM: DRA7: DDR3: Add support for HW leveling by Lokesh Vutla · Wed Jun 03 14:43:21 2015 +0530
  11. 440336f ARM: DRA7-evm: DDR3: Update leveling values by Lokesh Vutla · Mon Feb 16 10:15:57 2015 +0530
  12. b7eecd7 ARM: DRA7: EMIF: Update SDRAM_REF_CTRL register value by Lokesh Vutla · Mon Feb 16 10:15:56 2015 +0530
  13. 94dc3f2 ARM: DRA72x: DDR3: Fix EMIF timings for 666MHz clock by Angela Stegmaier · Mon Feb 16 10:15:55 2015 +0530
  14. ab7df84 arm: omap5: sdram: mark emif_get_ext_phy_ctrl_const_regs __weak by Felipe Balbi · Thu Nov 06 08:28:49 2014 -0600
  15. 5a9d4d1 ARM: DRA72: DDR3: Add emif settings for 666MHz clock by R Sricharan · Thu Aug 28 12:01:04 2014 +0530
  16. 6ff822d ARM: DRA7: Enable software leveling for dra7 by Sricharan R · Thu Jul 31 12:05:50 2014 +0530
  17. 4d3be73 ARM: DRA72x: Update EMIF data by Lokesh Vutla · Thu May 15 11:08:41 2014 +0530
  18. 60475ff DRA7: Add support for ES1.1 silicon ID code by Nishanth Menon · Tue Jan 14 10:54:42 2014 -0600
  19. 4796b7a ARM: DRA7/OMAP5: EMIF: Add workaround for bug 0039 by SRICHARAN R · Fri Nov 08 17:40:38 2013 +0530
  20. e02f5f8 ARM: DRA: EMIF: Change DDR3 settings to use hw leveling by SRICHARAN R · Fri Nov 08 17:40:37 2013 +0530
  21. d79de1d Add GPL-2.0+ SPDX-License-Identifier to source files by Wolfgang Denk · Mon Jul 08 09:37:19 2013 +0200
  22. ffa9818 ARM: DRA7xx: EMIF: Change settings required for EVM board by Sricharan R · Thu May 30 03:19:39 2013 +0000
  23. 8caa56c arm: dra7xx: Add DDR related data for DRA752 ES1.0 by Lokesh Vutla · Tue Feb 12 21:29:07 2013 +0000
  24. 79a9ec7 ARM: OMAP5: Add DDR changes required for OMAP543X ES2.0 SOCs by Lokesh Vutla · Tue Feb 12 01:33:44 2013 +0000
  25. 05dab55 ARM: OMAP4+: Cleanup emif specific files by Lokesh Vutla · Mon Feb 04 04:22:03 2013 +0000
  26. b9f10a5 ARM: OMAP4+: Move external phy initialisations to arch specific place. by SRICHARAN R · Mon Jun 04 03:40:23 2012 +0000
  27. c5b931a OMAP5: ADD precalculated timings for ddr3 by Lokesh Vutla · Tue May 22 00:03:24 2012 +0000
  28. e06bc10 ARM: OMAP5: dmm: Create a tiler trap section. by SRICHARAN R · Thu May 17 00:12:07 2012 +0000
  29. 99c43be OMAP5: ddr: Change the ddr device name. by SRICHARAN R · Mon Mar 12 02:25:45 2012 +0000[Renamed (87%) from arch/arm/cpu/armv7/omap5/sdram_elpida.c]
  30. 3d53496 OMAP5: emif/ddr: Change emif settings as required for ES1.0 silicon. by SRICHARAN R · Mon Mar 12 02:25:37 2012 +0000
  31. 62a8650 omap5: emif: Add emif/ddr configurations required for omap5 evm by Sricharan · Tue Nov 15 09:50:00 2011 -0500