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git01.mediatek.com / filogic / uboot / 69cec07d515a9c2b0aeb1a49867b2d85e4d48c7f / drivers / ddr
  1. 2a9b1f5 ddr: imx8m: Return error values from LPDDR4 training by Frieder Schrempf · Wed Dec 11 10:01:19 2019 +0000
  2. 9f7ee33 imx8m: ddr_init: Move ddr_init() messages to debug level by Fabio Estevam · Wed Dec 11 17:37:09 2019 -0300
  3. 1d91ba7 common: Move some cache and MMU functions out of common.h by Simon Glass · Thu Nov 14 12:57:37 2019 -0700
  4. e874433 ddr: socfpga: gen5: constify altera_gen5_sdram_ops by Simon Goldschmidt · Wed Oct 23 22:19:37 2019 +0200
  5. 828d41b ddr: imx8m: Fix the ddr init hang on imx8mq by Jacky Bai · Thu Aug 08 09:59:11 2019 +0000
  6. d62ddc1 driver: ddr: Refine the ddr init driver on imx8m by Jacky Bai · Thu Aug 08 09:59:08 2019 +0000
  7. 69b8eb0 imx8mq: Update the ddrc QoS setting for B1 chip by Bai Ping · Thu Aug 08 09:59:05 2019 +0000
  8. f19c31c ddr: imx8m: Fix ddr4 driver build issue by Ye Li · Thu Aug 08 09:59:02 2019 +0000
  9. 4f992e5 ddr: imx8m: fix ddr firmware location when enable SPL OF by Peng Fan · Tue Aug 27 06:24:47 2019 +0000
  10. 375038f ddr, fsl: add DM_I2C support by Heiko Schocher · Mon Aug 26 17:28:34 2019 +0200
  11. 37c2c5e boards: lx2160a: Add support of I2C driver model by Chuanhua Han · Wed Jul 10 21:00:20 2019 +0800
  12. db22961 env: Move env_get_f() to env.h by Simon Glass · Thu Aug 01 09:46:42 2019 -0600
  13. 2be4a3e dm: ddr: socfpga: fix gen5 ddr driver to not use bss by Simon Goldschmidt · Thu Jul 11 21:18:12 2019 +0200
  14. 805cac1 mpc83xx: Get rid of CONFIG_SYS_DDR_SDRAM_BASE by Mario Six · Mon Jan 21 09:18:16 2019 +0100
  15. 3fdf436 arm: socfpga: Move Stratix 10 SDRAM driver to DM by Ley Foon Tan · Mon May 06 09:56:01 2019 +0800
  16. 17b9ba6 ddr: altera: Compile ALTERA SDRAM in SPL only by Ley Foon Tan · Mon May 06 09:55:59 2019 +0800
  17. ca09d4c ddr: imx8m: hide i.MX8M DDR options from device driver entry by Peng Fan · Mon Apr 22 10:41:28 2019 +0000
  18. 9799a67 ddr: altera: Stratix10: Add ECC memory scrubbing by Ley Foon Tan · Fri Mar 22 01:24:05 2019 +0800
  19. 4bbed7b ddr: altera: Stratix10: Add multi-banks DRAM size check by Ley Foon Tan · Fri Mar 22 01:24:01 2019 +0800
  20. a9245d1 ddr: altera: stratix10: Move SDRAM size check to SDRAM driver by Ley Foon Tan · Fri Mar 22 01:24:00 2019 +0800
  21. 24910c3 arm: socfpga: move gen5 SDR driver to DM by Simon Goldschmidt · Tue Apr 16 22:04:39 2019 +0200
  22. a8f845e arm: mvebu: Add Marvell's integrated CPUs by Chris Packham · Thu Apr 11 22:22:50 2019 +1200
  23. 580b2b4 mv_ddr: ddr3: only use active chip-selects when tuning ODT by Chris Packham · Fri Mar 01 10:11:14 2019 +1300
  24. ac8bfb1 mv_ddr: ddr3: fix tRAS timimg parameter by Chris Packham · Fri Mar 01 10:11:13 2019 +1300
  25. 0f36715 ddr: socfpga: Clean up ddr_setup() by Marek Vasut · Sat Mar 09 21:58:09 2019 +0100
  26. 569fe4a ddr: socfpga: Clean up EMIF reset by Marek Vasut · Sat Mar 09 21:57:58 2019 +0100
  27. a9c0470 ddr: socfpga: Fix EMIF clear timeout by Marek Vasut · Fri Mar 08 19:11:55 2019 +0100
  28. 6b44050 ddr: socfpga: Fix newline in debug print on A10 by Marek Vasut · Wed Mar 06 17:18:22 2019 +0100
  29. e2bc6b1 ddr: socfpga: Fix IO in Arria10 DDR driver by Marek Vasut · Tue Mar 05 18:37:02 2019 +0100
  30. ba2414f configs: fsl: move DDR specific defines to Kconfig by Rajesh Bhagat · Fri Feb 01 05:22:01 2019 +0000
  31. 419ffc9 drivers/ddr/fsl: Update fsl_ddr_board_options as weak function by Priyanka Jain · Mon Oct 29 09:37:36 2018 +0000
  32. 692f943 drivers: ddr: introduce DDR driver for i.MX8M by Peng Fan · Tue Nov 20 10:19:57 2018 +0000
  33. 3f829b8 Merge tag 'fsl-qoriq-for-v2019.01-rc2' of git://git.denx.de/u-boot-fsl-qoriq by Tom Rini · Mon Dec 10 17:12:52 2018 -0500
  34. 2e0d2ba ARM: mvebu: restore license information in mv_ddr_plat.{c,h} by Chris Packham · Mon Dec 10 10:41:15 2018 +1300
  35. 4bf81db ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02 by Chris Packham · Mon Dec 03 14:26:49 2018 +1300
  36. ef76b2e armv8: lx2160a: Add LX2160A SoC Support by Priyanka Jain · Mon Oct 29 09:17:09 2018 +0000
  37. 897dbd7 socfpga: stratix10: fix sdram_calculate_size by Dalon Westergreen · Tue Sep 11 10:06:14 2018 -0700
  38. 1a491e8 drivers/ddr/fsl: fix '__hwconfig without a buffer' messages by Jeremy Gebben · Fri Jul 20 16:00:36 2018 -0600
  39. 3693897 ddr: altera: Add ECC DRAM scrubbing support for Arria10 by Marek Vasut · Mon May 28 17:22:47 2018 +0200
  40. 023b31b ddr: altera: Drop custom dram_bank_mmu_setup() on Arria10 by Marek Vasut · Tue May 29 18:04:15 2018 +0200
  41. f9c7f79 ddr: altera: stratix10: Add DDR support for Stratix10 SoC by Ley Foon Tan · Thu May 24 00:17:30 2018 +0800
  42. 4606fc7 SPDX: Fixup SPDX tags in a few new files by Tom Rini · Sun May 20 09:47:45 2018 -0400
  43. 4d447a5 configs: Add DDR Kconfig support for Arria 10 by Tien Fong Chee · Tue Dec 05 15:58:03 2017 +0800
  44. 402735b ARM: socfpga: Add DDR driver for Arria 10 by Tien Fong Chee · Tue Dec 05 15:58:02 2017 +0800
  45. 38fad17 ARM: socfpga: Rename the gen5 sdram driver to more specific name by Tien Fong Chee · Tue Dec 05 15:58:00 2017 +0800
  46. 0359c49 ARM: mvebu: a38x: Add missing SPDX license identfier by Chris Packham · Tue May 15 13:31:11 2018 +1200
  47. 915f8ee ARM: mvebu: a38x: use non-zero size for ddr scrubbing by Chris Packham · Thu May 10 13:28:31 2018 +1200
  48. 3a09e13 ARM: mvebu: a38x: restore support for setting timing by Chris Packham · Thu May 10 13:28:30 2018 +1200
  49. 1a07d21 ARM: mvebu: a38x: sync ddr training code with upstream by Chris Packham · Thu May 10 13:28:29 2018 +1200
  50. 5ec8ff7 ARM: mvebu: a38x: remove some unused code by Chris Packham · Thu May 10 13:28:28 2018 +1200
  51. cf43391 ARM: mvebu: a38x: move sys_env_device_rev_get by Chris Packham · Thu May 10 13:28:27 2018 +1200
  52. d16a695 ARM: mvebu: a38x: move definition of PEX_CFG_DIRECT_ACCESS by Chris Packham · Thu May 10 13:28:26 2018 +1200
  53. 10e4779 SPDX: Convert all of our single license tags to Linux Kernel style by Tom Rini · Sun May 06 17:58:06 2018 -0400
  54. bdfb5c4 Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR by Tom Rini · Wed Apr 18 13:50:47 2018 -0400
  55. d3e6816 Revert "drivers/ddr/fsl: Dual-license DDR driver" by Tom Rini · Wed Feb 14 21:34:05 2018 -0500
  56. 6d49eda drivers/ddr/fsl: Dual-license DDR driver by York Sun · Wed Feb 07 11:47:22 2018 -0800
  57. 74588bb drivers/ddr/fsl: Cleanup unused variable by York Sun · Mon Jan 29 09:44:38 2018 -0800
  58. 194c2f4 drivers/ddr/fsl: Modify binding registers to save time on data init by York Sun · Mon Jan 29 09:44:37 2018 -0800
  59. bc2f32a drivers/ddr/fsl: Add calculation of register control words by York Sun · Mon Jan 29 10:24:08 2018 -0800
  60. 6db4fdd drivers/ddr/fsl: Add 3DS RDIMM support by York Sun · Mon Jan 29 09:44:35 2018 -0800
  61. 2a4859e drivers/ddr/fsl: Fix workaround for A009803 by York Sun · Mon Jan 29 09:44:34 2018 -0800
  62. d9f7fa0 drivers/ddr/fsl: Fix DDR4 RDIMM support by York Sun · Mon Jan 29 09:44:33 2018 -0800
  63. c00a369 Merge git://git.denx.de/u-boot-socfpga by Tom Rini · Sat Jan 27 14:48:41 2018 -0500
  64. 60649bb Merge git://git.denx.de/u-boot-spi by Tom Rini · Fri Jan 26 07:46:34 2018 -0500
  65. a4af914 ddr: altera: silence PHY calibration unless in debug mode by Goldschmidt Simon · Thu Jan 25 06:04:44 2018 +0000
  66. 918de03 wait_bit: use wait_for_bit_le32 and remove wait_for_bit by Álvaro Fernández Rojas · Tue Jan 23 17:14:55 2018 +0100
  67. 661bc24 ddr: fsl: set cdr1 first in case 0.9v VDD is enabled for some SoCs by Rajesh Bhagat · Wed Jan 17 16:13:06 2018 +0530
  68. 5450f0c ddr: marvell: update ddr controller init and freq by Chris Packham · Thu Jan 18 17:16:10 2018 +1300
  69. d5c581c ddr: marvell: update additional ODT setting by Chris Packham · Thu Jan 18 17:16:09 2018 +1300
  70. 1324fab ddr: marvell: use correct TREFI value by Chris Packham · Thu Jan 18 17:16:08 2018 +1300
  71. ae80614 ddr: marvell: only assert M_ODT[0] on write for a single CS by Chris Packham · Thu Jan 18 17:16:07 2018 +1300
  72. b25faa2 armv8: ls1088a: Add NXP LS1088A SoC support by Ashish Kumar · Thu Aug 31 16:12:53 2017 +0530
  73. 64b723f env: Rename getenv/_f() to env_get() by Simon Glass · Thu Aug 03 12:22:12 2017 -0600
  74. 273d3f7 arm: mvebu: ddr3_debug: remove self assignments by xypron.glpk@gmx.de · Sun Jul 30 21:54:56 2017 +0200
  75. 94e8daa arm: mvebu: remove self assignment by xypron.glpk@gmx.de · Sun Jul 30 21:51:05 2017 +0200
  76. f8bf75f driver/ddr: Add support for setting timing in hws_topology_map by Marek Behún · Fri Jun 09 19:28:40 2017 +0200
  77. 622b7b3 treewide: remove unneeded semicolons by Masahiro Yamada · Tue Jun 13 15:17:28 2017 +0900
  78. f43278e driver: ddr: fsl: Fix compiling error for DDR2 by York Sun · Thu May 25 17:03:23 2017 -0700
  79. 89e0a3a common: arm: freescale: layerscape: Move header files out of common.h by Simon Glass · Wed May 17 08:23:10 2017 -0600
  80. 243182c common: freescale: Move arch-specific declarations by Simon Glass · Wed May 17 08:23:06 2017 -0600
  81. cffa503 Merge git://git.denx.de/u-boot-fsl-qoriq by Tom Rini · Tue Apr 18 11:36:06 2017 -0400
  82. 5fecf83 ddr: fsl: incorrect logical constraint in populate_memctl_options by xypron.glpk@gmx.de · Sat Apr 15 15:23:49 2017 +0200
  83. 7d2e8e4 drivers: ddr: fsl: fix unused-const-variable warnings by Thomas Schaefer · Tue Mar 28 11:29:56 2017 -0700
  84. 03017c5 Merge branch 'master' of git://git.denx.de/u-boot-socfpga by Tom Rini · Fri Apr 14 09:05:57 2017 -0400
  85. 016539e arm: socfpga: Convert Altera DDR SDRAM driver to use Kconfig by Ley Foon Tan · Wed Apr 05 17:32:51 2017 +0800
  86. d35f338 board_f: Rename initdram() to dram_init() by Simon Glass · Thu Apr 06 12:47:05 2017 -0600
  87. 39f90ba board_f: Drop return value from initdram() by Simon Glass · Fri Mar 31 08:40:25 2017 -0600
  88. fe84507 ddr: fsl: Merge macro CONFIG_NUM_DDR_CONTROLLERS and CONFIG_SYS_NUM_DDR_CTRLS by York Sun · Wed Dec 28 08:43:45 2016 -0800
  89. dcd28c0 ddr: fsl: Move macro CONFIG_NUM_DDR_CONTROLLERS to Kconfig by York Sun · Wed Dec 28 08:43:44 2016 -0800
  90. be73553 powerpc: mpc85xx: Move CONFIG_SYS_FSL_ERRATUM_* to Kconfig by York Sun · Wed Dec 28 08:43:43 2016 -0800
  91. 1dc61ca arm: layerscape: Move CONFIG_SYS_FSL_ERRATUM_* to Kconfig by York Sun · Wed Dec 28 08:43:41 2016 -0800
  92. d297d39 fsl_ddr: Move DDR config options to driver Kconfig by York Sun · Wed Dec 28 08:43:40 2016 -0800
  93. 15875a5 fsl/ddr: Add erratum_a009942_check_cpo and clean related erratum by Shengzhou Liu · Mon Nov 21 11:36:48 2016 +0800
  94. 7566ac1 fsl/ddr: Fix compiling warning by Shengzhou Liu · Mon Nov 21 11:36:47 2016 +0800
  95. 32be34d powerpc: MPC8555: Remove macro CONFIG_MPC8555 by York Sun · Wed Nov 16 11:23:23 2016 -0800
  96. bf820c0 powerpc: mpc8541: Remove macro CONFIG_MPC8541 by York Sun · Wed Nov 16 11:18:31 2016 -0800
  97. 3ea5951 ddr: altera: Configuring SDRAM extra cycles timing parameters by Chin Liang See · Wed Sep 21 10:25:56 2016 +0800
  98. c5b1e5d Various, accumulated typos collected from around the tree. by Robert P. J. Day · Wed Sep 07 14:27:59 2016 -0400
  99. 71c10a4 Merge git://git.denx.de/u-boot-fsl-qoriq by Tom Rini · Mon Sep 26 13:24:46 2016 -0400
  100. c1e979b driver: ddr: fsl_mmdc: Pass board parameters through data structure by York Sun · Mon Sep 26 08:09:25 2016 -0700