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git01.mediatek.com / filogic / uboot / 5f854a385bf1442a928bfb5ae39682f03eb93ce6 / drivers / clk / rockchip / clk_rv1108.c
  1. 432976f rockchip: clk: bind reset driver by Elaine Zhang · Tue Dec 19 18:22:38 2017 +0800
  2. 4fbb6c2 rockchip: clock: update sysreset driver binding by Kever Yang · Fri Nov 03 15:16:13 2017 +0800
  3. 81e1042 treewide: replace with error() with pr_err() by Masahiro Yamada · Sat Sep 16 14:10:41 2017 +0900
  4. 0f106cc rockchip: clk: Add rv1108 SARADC clock support by David Wu · Wed Sep 20 14:28:18 2017 +0800
  5. f20995b rockchip: clk: remove RATE_TO_DIV by Kever Yang · Thu Jul 27 12:54:02 2017 +0800
  6. 20ef0fc clk_rv1108.c: Fix unused variable warning by Tom Rini · Fri Jun 16 13:06:28 2017 -0400
  7. 6d95cd5 rockchip: clk: Add rv1108 clock driver by Andy Yan · Thu Jun 01 18:00:36 2017 +0800