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git01.mediatek.com / filogic / uboot / 5c3767e34fa8e765b736b242d64b1ef4fa80dc22 / arch / arm / mach-socfpga / clock_manager_gen5.c
  1. 10e4779 SPDX: Convert all of our single license tags to Linux Kernel style by Tom Rini · Sun May 06 17:58:06 2018 -0400
  2. bdfb5c4 Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR by Tom Rini · Wed Apr 18 13:50:47 2018 -0400
  3. 1c478c2 ARM: socfpga: Convert callers of cm_write_with_phase for wait_for_bit_le32 by Tom Rini · Fri Jan 26 11:24:04 2018 -0500
  4. 7473932 SOCFPGA: clock manager: implement dw_spi_get_clk function by Eugeniy Paltsev · Thu Dec 28 15:09:02 2017 +0300
  5. 918de03 wait_bit: use wait_for_bit_le32 and remove wait_for_bit by Álvaro Fernández Rojas · Tue Jan 23 17:14:55 2018 +0100
  6. ec6f882 arm: socfpga: Restructure clock manager driver by Ley Foon Tan · Wed Apr 26 02:44:33 2017 +0800