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git01.mediatek.com / filogic / uboot / 59ea2877f72eb8b1443526890fe02bf2d1099171 / drivers / clk / rockchip / clk_rk3188.c
  1. 85be807 rockchip: clk: rk3188: convert to use live dt by Kever Yang · Sun Feb 11 11:53:06 2018 +0800
  2. 432976f rockchip: clk: bind reset driver by Elaine Zhang · Tue Dec 19 18:22:38 2017 +0800
  3. 4fbb6c2 rockchip: clock: update sysreset driver binding by Kever Yang · Fri Nov 03 15:16:13 2017 +0800
  4. f20995b rockchip: clk: remove RATE_TO_DIV by Kever Yang · Thu Jul 27 12:54:02 2017 +0800
  5. 99b546d rockchip: clk: update dwmmc clock div by Kever Yang · Thu Jul 27 12:54:01 2017 +0800
  6. ba1dea4 dm: Rename dev_addr..() functions by Simon Glass · Wed May 17 17:18:05 2017 -0600
  7. c06ade2 rockchip: clk: rk3188: add ciu_clk entry for eMMC/SDMMC/SDIO by Xu Ziyuan · Sun Apr 16 17:44:44 2017 +0800
  8. 4126265 rockchip: clk: rk3188: Allow configuration of the armclk by Heiko Stübner · Mon Mar 20 12:40:32 2017 +0100
  9. 5616c63 rockchip: rk3188: Add clock driver by Heiko Stübner · Sat Feb 18 19:46:34 2017 +0100