Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / 586599b3c4bf2fc33f3604ebae045ed55feb4c6e / drivers / timer / riscv_aclint_timer.c
  1. 229f469 timer: riscv_aclint_timer: add timer_get_boot_us for BOOTSTAGE by Chanho Park · Wed Sep 06 14:18:14 2023 +0900
  2. b5f0372 riscv: Rename SiFive CLINT to RISC-V ALINT by Bin Meng · Wed Jun 21 23:11:46 2023 +0800[Renamed (75%) from drivers/timer/sifive_clint_timer.c]
  3. 51e3855 riscv: timer: Update the sifive clint timer driver to support aclint by Bin Meng · Wed Jun 21 23:11:44 2023 +0800
  4. 5ba5a20 Merge tag 'efi-2023-07-rc7' of https://source.denx.de/u-boot/custodians/u-boot-efi by Tom Rini · Tue Jul 11 13:27:32 2023 -0400