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filogic
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uboot
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5792f4b6a5f7540a41cf391b5a1d55633c3fa870
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drivers
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clk
5792f4b
dm: Use driver_info index instead of pointer
by Simon Glass
· Sat Oct 03 11:31:40 2020 -0600
6b927b1
dm: test: Add a test for of-platdata phandles
by Simon Glass
· Sat Oct 03 11:31:32 2020 -0600
b213ffc
clk: kendryte: no need to check argument of free()
by Heinrich Schuchardt
· Tue Sep 29 21:52:12 2020 +0200
863efd8
clk: ccf: replace the get_rate helper
by Dario Binacchi
· Wed Oct 14 23:42:17 2020 +0200
3434a5f
clk: renesas: Import R8A774C0 clock tables from Linux 5.9
by Lad Prabhakar
· Fri Oct 16 08:37:14 2020 +0100
eb6474c
clk: renesas: Add R8A774E1 clock tables
by Biju Das
· Wed Oct 14 18:17:36 2020 +0100
69159a2
clk: renesas: Add R8A774B1 clock tables
by Biju Das
· Wed Oct 14 18:17:35 2020 +0100
161bf54
clk: renesas: r8a774a1-cpg-mssr: Add R8A774A1 RPC clock
by Biju Das
· Tue Sep 29 11:09:44 2020 +0100
4eea088
clk: at91: sama7g5: add 5th divisor for mck0 layout and characteristics
by Eugen Hristev
· Wed Jul 01 10:44:21 2020 +0300
227fa12
clk: at91: clk-master: add 5th divisor for mck master
by Eugen Hristev
· Wed Jul 01 10:42:58 2020 +0300
baf5b52
clk: at91: sam9x60: add support compatible with CCF
by Claudiu Beznea
· Wed Oct 07 18:17:08 2020 +0300
51f27a8
clk: at91: Include device_compat.h in compat.c
by Tom Rini
· Thu Oct 15 21:44:43 2020 -0400
1f4d206
clk: sifive: Include device_compat.h
by Sean Anderson
· Sun Oct 04 21:39:42 2020 -0400
5de2f33
treewide: Fix wrong CONFIG_IS_ENABLED() handling
by Alper Nebi Yasak
· Mon Oct 05 09:57:29 2020 +0300
9579301
clk: agilex: Additional membus writes for HPS PLL
by Chee Hong Ang
· Fri Jul 10 20:55:23 2020 +0800
2d94ee6
clk: agilex: Handle clock configuration differently in SPL and U-Boot proper
by Chee Hong Ang
· Fri Jul 10 20:55:22 2020 +0800
7609220
clk: agilex: Add clock enable support
by Ley Foon Tan
· Fri Jul 10 20:55:21 2020 +0800
f94b0fd
clk: agilex: Add NAND clock support
by Ley Foon Tan
· Fri Jul 10 20:55:20 2020 +0800
d776a84
dm: add cells_count parameter in *_count_phandle_with_args
by Patrick Delaunay
· Fri Sep 25 09:41:14 2020 +0200
2a8bc03
Merge tag 'u-boot-atmel-2021.01-a' of https://gitlab.denx.de/u-boot/custodians/u-boot-atmel into next
by Tom Rini
· Mon Oct 05 10:54:27 2020 -0400
78928e1
clk: add clock driver for SCMI agents
by Etienne Carriere
· Wed Sep 09 18:44:04 2020 +0200
510bca3
riscv: clk: Add CLINT clock to kendryte clock driver
by Sean Anderson
· Mon Sep 28 10:52:27 2020 -0400
01c102d
Merge tag 'xilinx-for-v2021.01' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze into next
by Tom Rini
· Thu Sep 24 08:33:47 2020 -0400
34f6781
clk: fixed-rate: Enable DM_FLAG_PRE_RELOC flag
by Michal Simek
· Wed Sep 16 13:20:55 2020 +0200
3309308
xilinx: drivers: Use '_' instead of '-' in driver name
by Michal Simek
· Tue Jan 07 08:50:34 2020 +0100
57db4c4
clk: at91: sama7g5: add clock support
by Claudiu Beznea
· Mon Sep 07 17:46:52 2020 +0300
6fa9898
clk: at91: pmc: add generic clock ops
by Claudiu Beznea
· Mon Sep 07 17:46:51 2020 +0300
00e9b9a
clk: at91: clk-generic: add driver compatible with ccf
by Claudiu Beznea
· Mon Sep 07 17:46:50 2020 +0300
d0c738b
clk: at91: clk-peripheral: add driver compatible with ccf
by Claudiu Beznea
· Mon Sep 07 17:46:49 2020 +0300
ccb83c6
clk: at91: clk-system: add driver compatible with ccf
by Claudiu Beznea
· Mon Sep 07 17:46:48 2020 +0300
d96487b
clk: at91: clk-programmable: add driver compatible with ccf
by Claudiu Beznea
· Mon Sep 07 17:46:47 2020 +0300
6b5fa94
clk: at91: clk-utmi: add support for sama7g5
by Claudiu Beznea
· Mon Sep 07 17:46:46 2020 +0300
96179bd
clk: at91: clk-utmi: add driver compatible with ccf
by Claudiu Beznea
· Mon Sep 07 17:46:45 2020 +0300
e812b02
clk: at91: clk-master: add support for sama7g5
by Claudiu Beznea
· Mon Sep 07 17:46:44 2020 +0300
1f9023a
clk: at91: clk-master: add driver compatible with ccf
by Claudiu Beznea
· Mon Sep 07 17:46:43 2020 +0300
923ac87
clk: at91: sam9x60-pll: add driver compatible with ccf
by Claudiu Beznea
· Mon Sep 07 17:46:42 2020 +0300
5d40887
clk: at91: clk-main: add driver compatible with ccf
by Claudiu Beznea
· Mon Sep 07 17:46:41 2020 +0300
731bddd
clk: at91: sckc: add driver compatible with ccf
by Claudiu Beznea
· Mon Sep 07 17:46:40 2020 +0300
3f203a1
clk: at91: move clock code to compat.c
by Claudiu Beznea
· Mon Sep 07 17:46:39 2020 +0300
8fdb425
clk: at91: pmc: add helpers for clock drivers
by Claudiu Beznea
· Mon Sep 07 17:46:38 2020 +0300
b91eee6
clk: get clock pointer before proceeding
by Claudiu Beznea
· Mon Sep 07 17:46:36 2020 +0300
b02e8dd
clk: do not disable clock if it is critical
by Claudiu Beznea
· Mon Sep 07 17:46:35 2020 +0300
c8c1600
clk: bind clk to new parent device
by Claudiu Beznea
· Mon Sep 07 17:46:34 2020 +0300
d3e49d0
clk: check hw and hw->dev before dereference it
by Claudiu Beznea
· Mon Sep 07 17:46:32 2020 +0300
1e4a5c1
clock:aspeed: Sync with Linux kernel clock header define
by Ryan Chen
· Mon Aug 31 14:03:04 2020 +0800
5e6c9f0
cosmetic: aspeed: ast2500: Rename clock header
by Ryan Chen
· Mon Aug 31 14:03:03 2020 +0800
e51b57a
clk: mt7622: add needed clocks for ssusb-node
by Frank Wunderlich
· Thu Aug 20 16:37:55 2020 +0200
cee08a1
reset: drop unnecessary comment for pciesys
by Frank Wunderlich
· Thu Aug 20 16:37:53 2020 +0200
7cb5151
Merge tag 'u-boot-clk-24Aug2020' of https://gitlab.denx.de/u-boot/custodians/u-boot-clk
by Tom Rini
· Mon Aug 24 09:06:02 2020 -0400
2dbf94b
clk: ccf: Add missing #include <dm/uclass.h> to clk-mux.c
by Lukasz Majewski
· Mon Aug 24 11:12:18 2020 +0200
e7ce74d
clk: ccf: mux: change the get_rate helper
by Dario Binacchi
· Wed Jun 03 15:36:25 2020 +0200
88ea8df
clk: ccf: mux: fix access to the sandbox register
by Dario Binacchi
· Sat May 02 17:58:33 2020 +0200
5217bb1
clk: ccf: mux: fix typo
by Dario Binacchi
· Sat May 02 17:58:32 2020 +0200
3b32e6a
clk: ccf: mux: change include order
by Dario Binacchi
· Sat May 02 17:58:31 2020 +0200
8e312c5
clk: fix the console output of clk_register
by Dario Binacchi
· Sat May 02 17:38:11 2020 +0200
1a62dc1
clk: set flags in the ccf registration routines
by Dario Binacchi
· Mon Apr 13 14:36:27 2020 +0200
c98b802
dm: test: clk: add the test for the ccf gated clock
by Dario Binacchi
· Mon Apr 13 14:36:26 2020 +0200
8252da0
clk: imx6: Add definition for IMX6QDL_CLK_ENET_REF clock
by Lukasz Majewski
· Mon Feb 24 14:55:26 2020 +0100
b0f278b
clk: imx: Add support for pllv3 enet clock
by Lukasz Majewski
· Mon Feb 24 14:55:25 2020 +0100
cffad9c
clk: imx6: Add definition for IMX6QDL_CLK_ENET clock
by Lukasz Majewski
· Mon Feb 24 14:55:24 2020 +0100
d97552c
clk: ICS8N3QV01 remove superfluous code
by Heinrich Schuchardt
· Sat Feb 15 21:27:38 2020 +0100
32822d0
treewide: convert devfdt_get_addr_ptr() to dev_read_addr_ptr()
by Masahiro Yamada
· Tue Aug 04 14:14:43 2020 +0900
a633f00
dm: core: Fix devfdt_get_addr_ptr return value
by Ovidiu Panait
· Mon Aug 03 22:17:35 2020 +0300
98a7f50
Merge tag 'xilinx-for-v2020.10-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze
by Tom Rini
· Thu Aug 20 14:46:43 2020 -0400
1a7c058
clk: versal: Move pm_query_id out of clock driver
by Michal Simek
· Thu Jul 23 09:24:06 2020 +0200
8bdcb39
reset: add basic reset controller for pciesys
by Frank Wunderlich
· Thu Aug 13 10:20:46 2020 +0200
420e8bf
clk: mediatek: add pciesys support for MT7622 SoC
by developer
· Mon Aug 10 16:17:08 2020 +0800
4539b48
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-riscv
by Tom Rini
· Tue Aug 04 11:07:38 2020 -0400
4e8120b
Merge tag 'mips-pull-2020-08-03' of https://gitlab.denx.de/u-boot/custodians/u-boot-mips
by Tom Rini
· Tue Aug 04 11:07:16 2020 -0400
4303396
clk: Drop dm.h header file in clk-provider.h
by Simon Glass
· Sun Jul 19 10:15:56 2020 -0600
e1ff6eb
sifive: reset: add DM based reset driver for SiFive SoC's
by Sagar Shrikant Kadam
· Wed Jul 29 02:36:13 2020 -0700
9158b39
fu540: prci: use common reset indexes defined in binding header
by Sagar Shrikant Kadam
· Wed Jul 29 02:36:11 2020 -0700
560b07f
clk: clk_octeon: Add simple MIPS Octeon clock driver
by Stefan Roese
· Thu Jul 30 13:56:16 2020 +0200
48de37a
Merge tag 'dm-pull-20jul20-take2a' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm
by Tom Rini
· Mon Jul 27 11:15:37 2020 -0400
a89b4de
treewide: convert devfdt_get_addr() to dev_read_addr()
by Masahiro Yamada
· Fri Jul 17 14:36:48 2020 +0900
1096ae1
treewide: convert (void *)devfdt_get_addr() to dev_read_addr_ptr()
by Masahiro Yamada
· Fri Jul 17 14:36:46 2020 +0900
06c4f9b
clk: renesas: Add R8A774A1 clock tables
by Adam Ford
· Tue Jun 30 09:30:08 2020 -0500
5a9ecb2
Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm"
by Tom Rini
· Fri Jul 24 08:42:06 2020 -0400
cb41516
Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm
by Tom Rini
· Thu Jul 23 15:56:06 2020 -0400
0f0237d
drivers: clk: rockchip: clk_rk3328: Add SPI support
by Johannes Krottmayer
· Wed Jul 08 23:57:38 2020 +0200
a831cef
treewide: convert devfdt_get_addr() to dev_read_addr()
by Masahiro Yamada
· Fri Jul 17 14:36:48 2020 +0900
a3332a1
treewide: convert (void *)devfdt_get_addr() to dev_read_addr_ptr()
by Masahiro Yamada
· Fri Jul 17 14:36:46 2020 +0900
bb478b8
clk: imx8m: drop clk settings
by Peng Fan
· Thu Jul 09 15:36:22 2020 +0800
ee9c213
clk: imx8mp: Update imx8mp ccf clock driver
by Ye Li
· Tue Apr 21 20:19:24 2020 -0700
0321edb
clk: imx8mm/8mn: Add USB clocks
by Ye Li
· Sun Apr 19 02:22:09 2020 -0700
418c1fc
clk: clk-imx8mn: Update clock tree and support set parent
by Ye Li
· Sat Apr 18 08:19:12 2020 -0700
2dff879
clk: imx8mm: Add qspi clock
by Peng Fan
· Sat Jun 27 15:49:28 2020 +0800
6088c51
clk: imx8mm: fix clk set parent
by Peng Fan
· Sat Jun 27 15:48:04 2020 +0800
dc5b437
dtoc: extend dtoc to use struct driver_info when linking nodes
by Walter Lozano
· Thu Jun 25 01:10:13 2020 -0300
48e5b04
core: add support for U_BOOT_DRIVER_ALIAS
by Walter Lozano
· Thu Jun 25 01:10:06 2020 -0300
2901ac6
drivers: rename drivers to match compatible string
by Walter Lozano
· Thu Jun 25 01:10:04 2020 -0300
ea4179e
clk: actions: Add Ethernet clocks
by Amit Singh Tomar
· Sat May 09 19:55:09 2020 +0530
3d1fe4e
arm: stm32mp: add weak function to save vddcore
by Patrick Delaunay
· Mon May 25 12:19:45 2020 +0200
885bdc2
stm32mp1: clk: configure pll1 with OPP
by Patrick Delaunay
· Mon May 25 12:19:44 2020 +0200
42db70b
dm: Fix error handling for dev_read_addr_ptr
by Sean Anderson
· Wed Jun 24 06:41:13 2020 -0400
4d88d96
clk: Add K210 clock support
by Sean Anderson
· Wed Jun 24 06:41:11 2020 -0400
65cd44e
clk: Add a bypass clock for K210
by Sean Anderson
· Wed Jun 24 06:41:10 2020 -0400
6e887ee
clk: Add K210 pll support
by Sean Anderson
· Wed Jun 24 06:41:09 2020 -0400
f0d5a6b
clk: Fix clk_get_by_* handling of index
by Sean Anderson
· Wed Jun 24 06:41:08 2020 -0400
aa1e85f
clk: Check that ops of composite clock components exist before calling
by Sean Anderson
· Wed Jun 24 06:41:07 2020 -0400
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