| commit | 885bdc2d4939765e529840ecdb8bacdaf96339d6 | [log] [tgz] |
|---|---|---|
| author | Patrick Delaunay <patrick.delaunay@st.com> | Mon May 25 12:19:44 2020 +0200 |
| committer | Patrick Delaunay <patrick.delaunay@st.com> | Tue Jul 07 16:01:23 2020 +0200 |
| tree | 99298fd93ebb907fe3d7f24587b8b88aa9f1cbed | |
| parent | ff0c0bc84df7e19937f93f7e491a537adee92249 [diff] |
stm32mp1: clk: configure pll1 with OPP The PLL1 node (st,pll1) is optional in device tree, the max supported frequency define in OPP node is used when the node is absent. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>