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git01.mediatek.com / filogic / uboot / 5689ff1d3d3e03e52958cc8ec24442d80b730f3a / drivers / clk
  1. 315ac0f Merge branch 'master' of git://git.denx.de/u-boot-sunxi by Tom Rini · Wed Apr 17 09:19:45 2019 -0400
  2. fc22820 clk: sunxi: r40: Fix GMAC reset reg offset by Jagan Teki · Mon Apr 15 16:42:16 2019 +0530
  3. c5d9879 ARM: zynq: Add missing i2c get_rate for fixing i2c SPL by Hannes Schmelzer · Thu Feb 14 08:54:42 2019 +0100
  4. 8540b63 Merge tag 'pull-12apr19' of git://git.denx.de/u-boot-dm by Tom Rini · Sat Apr 13 08:27:35 2019 -0400
  5. 5f6830d Merge tag 'u-boot-stm32-20190412' of https://github.com/patrickdelaunay/u-boot by Tom Rini · Fri Apr 12 15:43:19 2019 -0400
  6. 5d06141 stm32mp1: add trusted boot with TF-A by Patrick Delaunay · Tue Feb 12 11:44:39 2019 +0100
  7. acdb7af clk: socfpga: replace dm_fdt_pre_reloc by dm_ofnode_pre_reloc by Patrick Delaunay · Wed Mar 20 18:21:25 2019 +0100
  8. f656ba8 clk: at91: replace dm_fdt_pre_reloc by dm_ofnode_pre_reloc by Patrick Delaunay · Wed Mar 20 18:21:24 2019 +0100
  9. 7841483 clk: renesas: Synchronize Gen3 tables with Linux 5.0 by Marek Vasut · Mon Mar 04 21:38:10 2019 +0100
  10. 3bee488 clk: renesas: Synchronize Gen2 tables with Linux 5.0 by Marek Vasut · Mon Mar 04 21:23:25 2019 +0100
  11. 98c2058 clk: renesas: Add R8A77965 clock tables by Marek Vasut · Mon Mar 04 13:36:13 2019 +0100
  12. 53698b2 clk: sunxi: a10: Add CLK_AHB_GMAC by Jagan Teki · Thu Mar 28 13:46:11 2019 +0530
  13. 0f6aa07 clk: renesas: Add support for setting MMCIF clock divider on Gen2 by Marek Vasut · Mon Mar 18 06:04:02 2019 +0100
  14. 31872db clk: renesas: Fix swapped div and mul in debug output on Gen2 by Marek Vasut · Mon Mar 18 05:38:08 2019 +0100
  15. 272daa7 clk: renesas: Fix SDH clock divider decoding on Gen2 by Marek Vasut · Mon Mar 18 05:11:42 2019 +0100
  16. 755e181 clk: sunxi: h3: Implement EPHY CLK and RESET by Jagan Teki · Thu Feb 28 00:26:59 2019 +0530
  17. 836631b clk: sunxi: Implement EMAC, GMAC clocks, resets by Jagan Teki · Thu Feb 28 00:26:57 2019 +0530
  18. f4b29f4 clk: sunxi: Implement A10 EMAC clocks by Jagan Teki · Thu Feb 28 00:26:49 2019 +0530
  19. bc12313 clk: sunxi: Implement SPI clocks, resets by Jagan Teki · Wed Feb 27 20:02:06 2019 +0530
  20. 412f604 Merge branch 'master' of git://git.denx.de/u-boot-sh by Tom Rini · Thu Feb 28 18:57:17 2019 -0500
  21. 8d28c3c clk: Add fixed-factor clock driver by Anup Patel · Mon Feb 25 08:14:55 2019 +0000
  22. 42fdf08 clk: Add SiFive FU540 PRCI clock driver by Anup Patel · Mon Feb 25 08:14:49 2019 +0000
  23. d0bb61b clk: rmobile: Drop def_bool per SoC by Marek Vasut · Mon Feb 18 13:22:47 2019 +0100
  24. 9a6ce2a clk: stm32mp1: correctly handle Clock Spreading Generator by Patrick Delaunay · Wed Jan 30 13:07:06 2019 +0100
  25. e8d836c clk: stm32mp1: add debug information by Patrick Delaunay · Wed Jan 30 13:07:04 2019 +0100
  26. 45e5da5 clk: stm32mp1: recalculate counter when switching freq by Patrick Delaunay · Wed Jan 30 13:07:03 2019 +0100
  27. f5aaa07 clk: stm32mp1: correct access to RCC_OCENSETR/RCC_OCENCLRR by Patrick Delaunay · Wed Jan 30 13:07:02 2019 +0100
  28. 629f44f clk: stm32mp1: add IPCC clock by Patrick Delaunay · Wed Jan 30 13:07:01 2019 +0100
  29. 7b72653 clk: stm32mp1: no more get ck_usbo_48m in device tree by Patrick Delaunay · Wed Jan 30 13:07:00 2019 +0100
  30. d27b317 rockchip: clk: Add mention of four new clocks by Simon Glass · Mon Jan 21 14:53:30 2019 -0700
  31. 3336373 clk: Improve debug message in clk_set_default_rates() by Simon Glass · Mon Jan 21 14:53:19 2019 -0700
  32. cf6741b rockchip: rk3288: Add i2s pinctrl and clock support by Simon Glass · Thu Dec 27 20:15:20 2018 -0700
  33. 030bab8 sunxi: clk: enable clk and reset for CCU devices by Andre Przywara · Tue Jan 29 15:54:08 2019 +0000
  34. 8c8c8a4 sunxi: clk: A80: add MMC clock support by Andre Przywara · Tue Jan 29 15:54:10 2019 +0000
  35. ddf33c1 sunxi: clk: add MMC gates/resets by Andre Przywara · Tue Jan 29 15:54:09 2019 +0000
  36. e366a0c clk: sunxi: Add Allwinner A80 CLK driver by Jagan Teki · Fri Jan 11 15:41:46 2019 +0530
  37. 5bc16d2 clk: sunxi: Add Allwinner H6 CLK driver by Jagan Teki · Mon Dec 31 15:35:01 2018 +0530
  38. b490aa5 clk: sunxi: Implement UART resets by Jagan Teki · Sun Dec 30 21:37:31 2018 +0530
  39. 8cf08ea clk: sunxi: Implement UART clocks by Jagan Teki · Sun Dec 30 21:29:24 2018 +0530
  40. d69bf0b clk: sunxi: Add Allwinner V3S CLK driver by Jagan Teki · Sun Aug 05 14:31:54 2018 +0530
  41. 66c07fd clk: sunxi: Add Allwinner R40 CLK driver by Jagan Teki · Sun Aug 05 11:16:33 2018 +0530
  42. 2474033 clk: sunxi: Add Allwinner A83T CLK driver by Jagan Teki · Thu Aug 02 23:33:55 2018 +0530
  43. 885abd8 clk: sunxi: Add Allwinner A23/A33 CLK driver by Jagan Teki · Thu Aug 02 23:25:03 2018 +0530
  44. 438e8f6 clk: sunxi: Add Allwinner A31 CLK driver by Jagan Teki · Thu Aug 02 23:15:34 2018 +0530
  45. 0c16029 clk: sunxi: Add Allwinner A10s/A13 CLK driver by Jagan Teki · Thu Aug 02 19:54:26 2018 +0530
  46. b38f7af clk: sunxi: Add Allwinner A10/A20 CLK driver by Jagan Teki · Thu Aug 02 16:52:37 2018 +0530
  47. 2ee11ff clk: sunxi: Add Allwinner H3/H5 CLK driver by Jagan Teki · Thu Aug 02 15:43:02 2018 +0530
  48. 7f6c2a8 reset: Add Allwinner RESET driver by Jagan Teki · Fri Jan 18 22:18:13 2019 +0530
  49. 1d150b4 clk: Add Allwinner A64 CLK driver by Jagan Teki · Sat Dec 22 21:32:49 2018 +0530
  50. 0225945 clk: MediaTek: bind ethsys reset controller by developer · Thu Dec 20 16:12:52 2018 +0800
  51. 5659e33 clk: imx8: fix build warning by Peng Fan · Sat Dec 15 12:19:46 2018 +0000
  52. cdc6f65 clk: uniphier: add NAND 200MHz clock by Masahiro Yamada · Wed Dec 19 20:03:20 2018 +0900
  53. 3247081 clk: stm32: add hardware spinlock clock by Benjamin Gaignard · Tue Nov 27 13:49:51 2018 +0100
  54. e546ec8 clk: Allow clock defaults to be set during re-reloc state for SPL only by Philipp Tomsich · Mon Nov 26 20:20:19 2018 +0100
  55. 7b56617 Merge branch 'master' of git://git.denx.de/u-boot-sh by Tom Rini · Mon Dec 03 17:51:45 2018 -0500
  56. c037903 ARM: meson: Add regmap support for clock driver by Loic Devulder · Tue Nov 27 17:41:18 2018 +0100
  57. c26bf89 clk: renesas: Allow reconfiguring SDHI clock on Gen3 by Marek Vasut · Tue Oct 30 17:54:20 2018 +0100
  58. 25c7ba9 rockchip: rk3399: Initialize CPU B clock. by Christoph Muellner · Fri Nov 30 20:32:48 2018 +0100
  59. 3afae5e ARM: rockchip: rv1108: Sync clock with vendor tree by Otavio Salvador · Fri Nov 30 11:34:12 2018 -0200
  60. c9e7ac8 Merge tag 'u-boot-amlogic-20181126' of git://git.denx.de/u-boot-amlogic by Tom Rini · Thu Nov 29 09:33:33 2018 -0500
  61. d1b1ffa clk: MediaTek: add clock driver for MT7623 SoC. by developer · Thu Nov 15 10:07:55 2018 +0800
  62. 2186c98 clk: MediaTek: add clock driver for MT7629 SoC. by developer · Thu Nov 15 10:07:54 2018 +0800
  63. 5e6db8c clk: Add clock driver for AXG by Neil Armstrong · Fri Sep 07 17:25:13 2018 +0200
  64. f897c4b ARM: meson: rework soc arch file to prepare for new SoC by Jerome Brunet · Fri Oct 05 17:00:37 2018 +0200
  65. 0af4233 clk: meson: silence debug print by Jerome Brunet · Fri Oct 26 15:42:50 2018 +0200
  66. cd97793 clk: meson: add static to meson_gates table by Neil Armstrong · Thu Nov 08 17:17:41 2018 +0100
  67. 587dc40 misc: Update read() and write() methods to return bytes xfered by Simon Glass · Tue Nov 06 15:21:39 2018 -0700
  68. 0107c61 clk: meson: fix clk81 divider calculation by Jerome Brunet · Tue Nov 13 11:38:38 2018 +0100
  69. 89d1b08 clk: Allow clock defaults to be set also during re-reloc state by Andreas Dannenberg · Wed Oct 17 13:43:14 2018 +0530
  70. c826a09 clk: Remove DM_FLAG_PRE_RELOC flag in various drivers by Bin Meng · Wed Oct 24 06:36:29 2018 -0700
  71. d7f3789 aspeed: ast2500: fix D2-PLL clock setting in RGMII mode by Cédric Le Goater · Mon Oct 29 07:06:41 2018 +0100
  72. 62b4bfd aspeed: ast2500: fix missing break in D2PLL clock enablement by Cédric Le Goater · Mon Oct 29 07:06:37 2018 +0100
  73. d6e53c7 drivers: cosmetic: Convert SPDX license tags to Linux Kernel style by Patrick Delaunay · Fri Oct 26 09:02:52 2018 +0200
  74. 5e80d5a clk: imx: add clk driver for i.MX8QXP by Peng Fan · Thu Oct 18 14:28:30 2018 +0200
  75. ba024e6 clk: Add support for Arm's Versatile Express OSC clock generators by Liviu Dudau · Mon Sep 17 17:50:00 2018 +0100
  76. 2dc9eba Merge git://git.denx.de/u-boot-marvell by Tom Rini · Wed Sep 19 20:35:05 2018 -0400
  77. 7bafd04 clk: armada-37xx-periph: Support changing clock parent and rate by Marek Behún · Fri Aug 17 12:58:52 2018 +0200
  78. 7cab147 clk: Add MPC83xx clock driver by Mario Six · Mon Aug 06 10:23:36 2018 +0200
  79. 1530e35 clk: Introduce TI System Control Interface (TI SCI) clock driver by Andreas Dannenberg · Mon Aug 27 15:57:43 2018 +0530
  80. 07f2477 clk: clk_meson: Add mux and div support for reparent and rate setting by Neil Armstrong · Mon Aug 06 14:49:20 2018 +0200
  81. 1586fbd Merge branch 'master' of git://git.denx.de/u-boot-sunxi by Tom Rini · Mon Aug 20 13:41:56 2018 -0400
  82. 536a61c Merge branch 'master' of git://git.denx.de/u-boot-socfpga by Tom Rini · Fri Aug 17 07:24:34 2018 -0400
  83. 3f9d735 clk: socfpga: Add initial Arria10 clock driver by Marek Vasut · Tue Jul 31 17:58:07 2018 +0200
  84. 7f9e879 clk: at91: utmi: add timeout for utmi lock by Eugen Hristev · Fri Aug 03 12:10:49 2018 +0300
  85. 9d2787c clk: Kconfig: Ascending order to sub directiory kconfigs by Jagan Teki · Mon Jul 30 18:26:18 2018 +0530
  86. f3cc631 clk: clk_set_default: accept no-op skip fields by Neil Armstrong · Thu Jul 26 15:19:32 2018 +0200
  87. 1119271 clk: add clk_valid() by Fabrice Gasnier · Tue Jul 24 16:31:28 2018 +0200
  88. 80cb568 stm32mp1: clk: support digital bypass by Patrick Delaunay · Mon Jul 16 10:41:46 2018 +0200
  89. 201f0d5 stm32mp1: clk: add ADC clock gating by Patrick Delaunay · Mon Jul 16 10:41:45 2018 +0200
  90. effe2b4 stm32mp1: clk: update Ethernet clock gating by Patrick Delaunay · Mon Jul 16 10:41:44 2018 +0200
  91. 8314d2c stm32mp1: clk: add LDTC and DSI clock support by Patrick Delaunay · Mon Jul 16 10:41:43 2018 +0200
  92. 5327d37 stm32mp1: clk: add common function pll_get_fvco by Patrick Delaunay · Mon Jul 16 10:41:42 2018 +0200
  93. a7c0fd6 stm32mp1: clk: define RCC_PLLNCFGR2_SHIFT macro by Patrick Delaunay · Mon Jul 16 10:41:41 2018 +0200
  94. b139a5b misc: stm32: Add STM32MP1 support by Patrick Delaunay · Mon Jul 09 15:17:20 2018 +0200
  95. 488f0e7 clk: zynqmp: Fixed the same if/else part error reported by coverity by Vipul Kumar · Wed Jun 27 10:44:45 2018 +0530
  96. 91a8513 clk: Add Actions Semi OWL clock support by Manivannan Sadhasivam · Thu Jun 14 23:38:35 2018 +0530
  97. b67bfaf clk: add Amlogic meson clock driver by Beniamino Galvani · Thu Jun 14 13:43:39 2018 +0200
  98. 2447b74 clk: rmobile: Add R8A77995 RPC clock by Marek Vasut · Thu Jun 14 05:26:31 2018 +0200
  99. 69be062 clk: rmobile: Add R8A77990 RPC clock by Marek Vasut · Wed Jun 13 21:25:24 2018 +0200
  100. 2467224 Merge branch 'master' of git://git.denx.de/u-boot-sh by Tom Rini · Fri Jun 01 21:10:18 2018 -0400