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git01.mediatek.com / filogic / uboot / 55f51d92f8c06efba5a26734c748c1093a748e64 / drivers / clk / rockchip / clk_rk322x.c
  1. 4fbb6c2 rockchip: clock: update sysreset driver binding by Kever Yang · Fri Nov 03 15:16:13 2017 +0800
  2. 180fded rockchip: rk322x: fix pd_bus hclk/pclk by Kever Yang · Thu Sep 28 18:24:03 2017 +0800
  3. b8e0545 rockchip: clk: fix typo in rk322x clock driver by Kever Yang · Wed Sep 27 16:59:56 2017 +0800
  4. f20995b rockchip: clk: remove RATE_TO_DIV by Kever Yang · Thu Jul 27 12:54:02 2017 +0800
  5. 99b546d rockchip: clk: update dwmmc clock div by Kever Yang · Thu Jul 27 12:54:01 2017 +0800
  6. c5ccc32 rockchip: rk322x: add clock driver by Kever Yang · Fri Jun 23 17:17:49 2017 +0800