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git01.mediatek.com / filogic / uboot / 55f51d92f8c06efba5a26734c748c1093a748e64 / drivers / clk / rockchip / clk_rk3188.c
  1. 4fbb6c2 rockchip: clock: update sysreset driver binding by Kever Yang · Fri Nov 03 15:16:13 2017 +0800
  2. f20995b rockchip: clk: remove RATE_TO_DIV by Kever Yang · Thu Jul 27 12:54:02 2017 +0800
  3. 99b546d rockchip: clk: update dwmmc clock div by Kever Yang · Thu Jul 27 12:54:01 2017 +0800
  4. ba1dea4 dm: Rename dev_addr..() functions by Simon Glass · Wed May 17 17:18:05 2017 -0600
  5. c06ade2 rockchip: clk: rk3188: add ciu_clk entry for eMMC/SDMMC/SDIO by Xu Ziyuan · Sun Apr 16 17:44:44 2017 +0800
  6. 4126265 rockchip: clk: rk3188: Allow configuration of the armclk by Heiko Stübner · Mon Mar 20 12:40:32 2017 +0100
  7. 5616c63 rockchip: rk3188: Add clock driver by Heiko Stübner · Sat Feb 18 19:46:34 2017 +0100