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git01.mediatek.com / filogic / uboot / 5243707d882ce77ae0aae78715cbee2718c41447 / arch / arm / cpu / armv7 / zynq / slcr.c
  1. 661ccfc zynq: slcr: Wait 100ms till clk is properly setup by Michal Simek · Wed May 08 15:37:28 2013 +0200
  2. d79de1d Add GPL-2.0+ SPDX-License-Identifier to source files by Wolfgang Denk · Mon Jul 08 09:37:19 2013 +0200
  3. 15d654c fpga: zynq: Add support for loading bitstream by Michal Simek · Mon Apr 22 15:43:02 2013 +0200
  4. d9f2c11 net: gem: Fix gem driver on 1Gbps LAN by Michal Simek · Mon Oct 15 14:01:23 2012 +0200
  5. eb1dfa7 arm: zynq: Add SLCR support with system reset by Michal Simek · Mon Feb 04 12:38:59 2013 +0100