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git01.mediatek.com / filogic / uboot / 5243707d882ce77ae0aae78715cbee2718c41447 / arch / arm / cpu / armv7 / zynq
  1. 661ccfc zynq: slcr: Wait 100ms till clk is properly setup by Michal Simek · Wed May 08 15:37:28 2013 +0200
  2. f5ff7bc zynq: Add new ddrc driver for ECC support by Michal Simek · Mon Jun 17 14:37:01 2013 +0200
  3. d79de1d Add GPL-2.0+ SPDX-License-Identifier to source files by Wolfgang Denk · Mon Jul 08 09:37:19 2013 +0200
  4. 15d654c fpga: zynq: Add support for loading bitstream by Michal Simek · Mon Apr 22 15:43:02 2013 +0200
  5. d9f2c11 net: gem: Fix gem driver on 1Gbps LAN by Michal Simek · Mon Oct 15 14:01:23 2012 +0200
  6. ad2e2b7 zynq: Move scutimer baseaddr to hardware.h by Michal Simek · Fri Apr 12 16:21:26 2013 +0200
  7. 8f1d0a5 arm: zynq: U-Boot udelay < 1000 FIX by David Andrey · Fri Dec 07 16:51:32 2012 +0100
  8. 6d46480 arm: zynq: Add lowlevel initialization to C by Michal Simek · Mon Feb 04 12:42:25 2013 +0100
  9. eb1dfa7 arm: zynq: Add SLCR support with system reset by Michal Simek · Mon Feb 04 12:38:59 2013 +0100
  10. a848da5 arm: Move lastinc to arch_global_data by Simon Glass · Thu Dec 13 20:48:35 2012 +0000
  11. 2655ee1 arm: Move tbl to arch_global_data by Simon Glass · Thu Dec 13 20:48:34 2012 +0000
  12. dea68a7 arm: Support new Xilinx Zynq platform by Michal Simek · Thu Sep 13 20:23:35 2012 +0000