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git01.mediatek.com / filogic / uboot / 51b06faf1fa6510c9ac92a70f493a6381ab4a869 / board / freescale / ls2080ardb / ddr.c
  1. 29a5301 fsl/board/ddr: optimize board-specific cpo for erratum A-009942 by Shengzhou Liu · Tue Nov 15 17:15:21 2016 +0800
  2. 1ef95cc armv8: Move secure_ram variable out of generic global data by York Sun · Fri Jun 24 16:46:18 2016 -0700
  3. cbe8e1c armv8: LS2080A: Consolidate LS2080A and LS2085A by York Sun · Mon Apr 04 11:41:26 2016 -0700
  4. 0804d56 armv8: fsl-layerscape: Make DDR non secure in MMU tables by York Sun · Fri Dec 04 11:57:08 2015 -0800
  5. db38977 armv8/ls2080ardb: Update DDR settings for four chip-select case by York Sun · Wed Nov 04 10:03:23 2015 -0800
  6. 122bcfd armv8: LS2080A: Rename LS2085A to reflect LS2080A by Prabhakar Kushwaha · Mon Nov 09 16:42:07 2015 +0530[Copied (98%) from board/freescale/ls2085aqds/ddr.c]
  7. 8e728cd armv8/ls2085aqds: NAND boot support by Scott Wood · Tue Mar 24 13:25:02 2015 -0700
  8. 0301703 armv8/ls2085aqds: Add support of LS2085AQDS platform by York Sun · Fri Mar 20 19:28:23 2015 -0700