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git01.mediatek.com / filogic / uboot / 4ff6bc0693f7c8bc722aeb9709df3fb4ec659bf5 / cpu / mpc85xx
  1. 4ff6bc0 ppc: Loose GOT access in IRQ by Joakim Tjernlund · 15 years ago
  2. 39cca8d kgdb: drop duplicate debugger_exception_handler by Mike Frysinger · 15 years ago
  3. 41a433a ppc/p4080: Fix reporting of PME & FM clock frequencies by Kumar Gala · 15 years ago
  4. 4756ffa ppc/85xx: Map boot page guarded for MP boot by Kumar Gala · 15 years ago
  5. 452ddb6 p4080: add readback to bootpage translation window by Dave Liu · 15 years ago
  6. 419083b ppc/85xx: Make SPD DDR TLB setup code use dynamic entry allocation by Kumar Gala · 15 years ago
  7. 42f9918 ppc/85xx: Add tracking of TLB CAM usage by Kumar Gala · 15 years ago
  8. b915e0d 85xx: Add support to set DPAA (data path) devices clock frequencies by Kumar Gala · 16 years ago
  9. 8d2817c 85xx: Add support for e500mc cache stashing by Kumar Gala · 16 years ago
  10. 0f602e1 common: delete CONFIG_SYS_64BIT_VSPRINTF and CONFIG_SYS_64BIT_STRTOUL by Heiko Schocher · 15 years ago
  11. c32d80f Merge branch 'master' into next by Wolfgang Denk · 15 years ago
  12. 46ada59 ppc/85xx: make boot from NAND full relocation to RAM by Mingkai Hu · 15 years ago
  13. 7601fb2 ppc/85xx: Fix how we determine the number of CAM entries by Kumar Gala · 15 years ago
  14. b8bb411 ppc/85xx: Fix misc L2 cache enabling bug by Dave Liu · 15 years ago
  15. d61fbcc Coding Style cleanup; update CHANGELOG, prepare -rc1 by Wolfgang Denk · 15 years ago
  16. da22594 mpc85xx: Add eSDHC support for MPC8569E-MDS boards by Anton Vorontsov · 15 years ago
  17. 7feaacb 85xx: MP Boot Page Translation update by Peter Tyser · 15 years ago
  18. 15bf283 ppc/85xx: Fix crashes due to generation of SPE instruction by Leon Woestenberg · 15 years ago
  19. 1721819 ppc/85xx: Make L2 support more robust by Dave Liu · 15 years ago
  20. 4f2fdac relocation: Do not relocate NULL pointers. by Joakim Tjernlund · 15 years ago
  21. 430445f 85xx: Ensure BSS segment isn't linked at address 0 by Peter Tyser · 15 years ago
  22. f48fabc ppc: Enable full relocation to RAM by Peter Tyser · 15 years ago
  23. dccd9e3 ppc/p4080: Determine various chip frequencies on CoreNet platforms by Kumar Gala · 16 years ago
  24. 24f86a8 ppc/p4080: Handle timebase enabling and frequency reporting by Kumar Gala · 15 years ago
  25. bb5409c ppc/p4080: Add various p4080 related defines (and p4040) by Kumar Gala · 16 years ago
  26. 4d9190d ppc/p4080: CoreNet platfrom style secondary core release by Kumar Gala · 15 years ago
  27. a6e7bbf ppc/p4080: CoreNet platfrom style CCSRBAR setting by Kumar Gala · 15 years ago
  28. b6a4090 ppc/85xx: Fix enabling of L2 cache by Kumar Gala · 15 years ago
  29. 780e42b 85xx-fdt: Fixed l2-ctlr's compatible prop for QorIQ by Vivek Mahajan · 15 years ago
  30. 5fbc7cf ppc/85xx: add cpu init config file for boot from NAND by Mingkai Hu · 15 years ago
  31. 59fd9e2 ppc/85xx: add ld script file for boot from NAND by Mingkai Hu · 15 years ago
  32. 9faa23a ppc/85xx: Disable all async interrupt sources when we boot by Kumar Gala · 15 years ago
  33. 64dd178 ppc/85xx: Split out cpu_init_early into its own file for NAND_SPL by Kumar Gala · 15 years ago
  34. 8aa8cdd ppc/85xx: Change cpu_init_early_f so we can use with NAND SPL by Kumar Gala · 15 years ago
  35. 0255cd7 ppc/85xx: add boot from NAND/eSDHC/eSPI support by Mingkai Hu · 15 years ago
  36. afc51ad ppc/85xx: Move code around to prep for NAND_SPL by Kumar Gala · 15 years ago
  37. f82885e ppc/85xx: Repack tlb_table to save space by Kumar Gala · 15 years ago
  38. c417c91 ppc/85xx: Introduce low level write_tlb function by Kumar Gala · 15 years ago
  39. e957bd7 ppc/85xx: Remove some bogus code from external interrupt handler. by Scott Wood · 15 years ago
  40. 31e6010 ppc/85xx: Ensure that MAS8 is zero when writing TLB entries. by Scott Wood · 15 years ago
  41. 4211596 ppc/85xx: Don't enable interrupts before we're ready by Scott Wood · 15 years ago
  42. 6472af8 ppc/85xx: Introduce RESET_VECTOR_ADDRESS to handle non-standard link address by Kumar Gala · 15 years ago
  43. aff0153 ppc/85xx: Clean up do_reset by Kumar Gala · 15 years ago
  44. 36a6843 ppc/85xx/86xx: Bug fix: call to puts in probecpu() moved to checkcpu(). by Poonam Aggrwal · 15 years ago
  45. 4ca72ae ppc/85xx/86xx: Device tree fixup for number of cores by Poonam Aggrwal · 15 years ago
  46. da6e1ca ppc/85xx,86xx: Handling Unknown SOC version by Poonam Aggrwal · 15 years ago
  47. 591ac07 ppc/85xx: Cleanup makefile and related optional files by Kumar Gala · 15 years ago
  48. 8399e12 ppc/85xx: Fix bug in setup_mp code by Kumar Gala · 15 years ago
  49. d13eb3c ppc/85xx: Add a simple function to search the TLB by Kumar Gala · 15 years ago
  50. c24a905 85xx: Add support for setting IVORs to fixed offset defaults by Kumar Gala · 15 years ago
  51. 9387773 ppc/85xx: Fix up eSDHC controller clock frequency in the device tree by Dipen Dudhat · 15 years ago
  52. 24aa71a ppc/8xxx: Remove ddr_pd_cntl register since it doesn't exist by Kumar Gala · 15 years ago
  53. 9af188d ppc/85xx: Use CONFIG_FSL_ESDHC to enable sdhc clk by Dipen Dudhat · 15 years ago
  54. c5abd7a 85xx: Improve MPIC initialization by Timur Tabi · 15 years ago
  55. 13e21b1 85xx: Added single core members of FSL P1xx/P2xx processors series by Poonam Aggrwal · 15 years ago
  56. d2088e0 85xx: Add L2SRAM Register's macro definition by Mingkai Hu · 15 years ago
  57. 2cca63f 85xx: Move to a common linker script by Kumar Gala · 15 years ago
  58. dfe86a7 85xx: Added P1020 Processor Support. by Poonam Aggrwal · 15 years ago
  59. 4baef82 8xxx: Removed CONFIG_NUM_CPUS from 85xx/86xx by Poonam Aggrwal · 15 years ago
  60. 9120884 8xxx: Refactored common cpu specific code for 85xx/86xx into one file. by Poonam Aggrwal · 15 years ago
  61. 4c81ed1 85xx: Remove redudant PLATFORM_CPPFLAGS by Kumar Gala · 15 years ago
  62. 6b9b996 Prepare 2009.08-rc3 by Wolfgang Denk · 15 years ago
  63. 87f5792 85xx: Fix addrmap to include memory by Kumar Gala · 15 years ago
  64. 6a6d948 Update Freescale copyrights to remove "All Rights Reserved" by Kumar Gala · 15 years ago
  65. 4e928b5 fsl_dma: Break out common memory initialization function by Peter Tyser · 15 years ago
  66. a9af1dc 8xxx: Move dma_init() call to common code by Peter Tyser · 15 years ago
  67. 4e5649f fsl_dma: Move dma function prototypes to common header file by Peter Tyser · 15 years ago
  68. 86ff89b 8xxx: Rename dma_xfer() to dmacpy() by Peter Tyser · 15 years ago
  69. ae7a7d4 8xxx: Break out DMA code to a common file by Peter Tyser · 15 years ago
  70. 1c9f44e fsl/85xx, 86xx: Sync up DMA code by Peter Tyser · 16 years ago
  71. 4c82e72 fsl: Create common fsl_dma.h for 85xx and 86xx cpus by Peter Tyser · 16 years ago
  72. 511d828 qe: Pass in uec_info struct through uec_initialize by Haiying Wang · 15 years ago
  73. 6141468 85xx: Add QE clk support by Haiying Wang · 16 years ago
  74. a917748 85xx: Added MPC8535/E identifiers by Kumar Gala · 16 years ago
  75. 47dcd7c 85xx: Always attempt ethernet device tree fixup by Kumar Gala · 16 years ago
  76. d10d3b1 85xx: Use print_size to report amount of memory not mapped by TLBs by Kumar Gala · 15 years ago
  77. 20db47d 85xx: bugfix for reading maximum TLB size on mpc85xx by Fredrik Arnerup · 15 years ago
  78. e1064b3 85xx: Introduce determine_mp_bootpg() helper. by Kumar Gala · 16 years ago
  79. c984913 MPC85xx: Add MPC8569 CPU support by Haiying Wang · 16 years ago
  80. e56f2c5 85xx: Add support for additional e500mc features by Kumar Gala · 16 years ago
  81. 4be87b2 fsl-ddr: add the DDR3 SPD infrastructure by Dave Liu · 16 years ago
  82. e674b83 Fix mpc85xx ddr-gen3 ddr_sdram_cfg. by Ed Swarthout · 16 years ago
  83. 1f79d14 Coding style cleanup, update CHANGELOG by Wolfgang Denk · 16 years ago
  84. 6843a6e 85xx: Add eSDHC support for 8536 DS by Andy Fleming · 16 years ago
  85. 30cb145 32bit BUg fix for DDR2 on 8572 by Poonam_Aggrwal-b10812 · 16 years ago
  86. a864f32 mpc85xx: Add support for the P2020 by Srikanth Srinivasan · 16 years ago
  87. 6630ffb 85xx: Fix how we map DDR memory by Kumar Gala · 16 years ago
  88. f92794c 85xx: Format cpu freq printing to handle 8 cores by Kumar Gala · 16 years ago
  89. bb8aea7 Add secondary CPUs processor frequency for e500 core by Haiying Wang · 16 years ago
  90. 64bb6d1 85xx: Convert CONFIG_SYS_PCI*_IO_BASE to _IO_BUS for FSL boards by Kumar Gala · 16 years ago
  91. 3fe8087 85xx: Convert CONFIG_SYS_{PCI*,RIO*}_MEM_BASE to _MEM_BUS for FSL boards by Kumar Gala · 16 years ago
  92. 8a353d5 Change DDR tlb start entry to CONFIG param for 85xx by Haiying Wang · 16 years ago
  93. 0b691fc mpc8[56]xx: Put localbus clock in sysinfo and gd by Trent Piepho · 16 years ago
  94. a8665ac mpc8568: Double local bus clock divider by Trent Piepho · 16 years ago
  95. 68aec14 85xx: Fix the boot window issue by Dave Liu · 16 years ago
  96. f474551 Set IVPR to kenrel entry point in second core boot page by Haiying Wang · 16 years ago
  97. 1b560ac mpc8xxx: LCRR[CLKDIV] is sometimes five bits by Trent Piepho · 16 years ago
  98. bc424c9 mpc8[56]xx: Put localbus clock in device tree by Trent Piepho · 16 years ago
  99. 9ac287a 85xx: Add support to populate addr map based on TLB settings by Kumar Gala · 16 years ago
  100. 6294850 Update U-Boot's build timestamp on every compile by Peter Tyser · 16 years ago