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filogic
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uboot
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45140f066a9abe616efe58d3d76123dd75dbe790
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arch
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riscv
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cpu
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generic
b5f0372
riscv: Rename SiFive CLINT to RISC-V ALINT
by Bin Meng
· Wed Jun 21 23:11:46 2023 +0800
4f4f583
board_f: Fix types for board_get_usable_ram_top()
by Pali Rohár
· Fri Sep 09 17:32:40 2022 +0200
1255ab8
riscv: qemu: Switch to use binman to generate u-boot.itb
by Bin Meng
· Mon May 10 20:23:39 2021 +0800
614b1d8
riscv: Split SiFive CLINT support between SPL and U-Boot proper
by Bin Meng
· Tue May 11 20:04:12 2021 +0800
2f00216
cpu: Rename SPL_CPU_SUPPORT to SPL_CPU
by Simon Glass
· Mon Mar 15 18:11:18 2021 +1300
b1db71b
Merge branch '2021-02-02-drop-asm_global_data-when-unused'
by Tom Rini
· Mon Feb 15 08:19:40 2021 -0500
489b25a
riscv: Adjust board_get_usable_ram_top() for 32-bit
by Bin Meng
· Sun Jan 31 20:35:57 2021 +0800
3ba929a
common: Drop asm/global_data.h from common header
by Simon Glass
· Fri Oct 30 21:38:53 2020 -0600
9baaaef
riscv: Rework riscv timer driver to only support S-mode
by Sean Anderson
· Mon Sep 28 10:52:21 2020 -0400
274e0b0
common: Drop net.h from common header
by Simon Glass
· Sun May 10 11:39:56 2020 -0600
6c1e6dd
riscv: qemu: Remove the simple-bus driver for the SoC node
by Bin Meng
· Thu Apr 16 08:09:28 2020 -0700
6980b6b
common: Move board_get_usable_ram_top() out of common.h
by Simon Glass
· Thu Nov 14 12:57:45 2019 -0700
8f3f761
common: Move enable/disable_interrupts out of common.h
by Simon Glass
· Thu Nov 14 12:57:42 2019 -0700
396f0bd
riscv: add SPL support
by Lukas Auer
· Wed Aug 21 21:14:45 2019 +0200
6134659
riscv: add run mode configuration for SPL
by Lukas Auer
· Wed Aug 21 21:14:43 2019 +0200
0bbe9cf
riscv: generic: Ensure that U-Boot runs within 4GB for 64bit systems
by Anup Patel
· Mon Feb 25 08:14:30 2019 +0000
1240cd6
riscv: Rename cpu/qemu to cpu/generic
by Anup Patel
· Mon Feb 25 08:14:10 2019 +0000