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git01.mediatek.com / filogic / uboot / 3c52107120b17920512f93fa51817c12fdaafad7 / arch / riscv / dts
  1. b0357f4 fu540: dtsi: add reset producer and consumer entries by Sagar Shrikant Kadam · Wed Jul 29 02:36:12 2020 -0700
  2. a9e7ec5 riscv: dts: hifive-unleashed-a00: Make memory node available to SPL by Bin Meng · Sun Jul 19 23:06:34 2020 -0700
  3. 05fb96d sifive: fu540: Add Booting from SPI by Jagan Teki · Wed Jul 15 15:38:59 2020 +0530
  4. 90fa4e9 Merge branch 'next' by Tom Rini · Mon Jul 06 15:46:38 2020 -0400
  5. 8a52128 riscv: sifive: fu540: enable all cache ways from U-Boot proper by Pragnesh Patel · Fri May 29 12:14:51 2020 +0530
  6. 3961e14 riscv: fu540: dts: Correct reg size of otp and dmc nodes by Bin Meng · Mon Jun 08 20:28:26 2020 -0700
  7. e3870c8 riscv: fu540: dts: Remove the unnecessary space in the cpu2_intc node by Bin Meng · Mon Jun 08 20:28:25 2020 -0700
  8. d2b7f84 riscv: dts: hifive-unleashed-a00: add cpu aliases by Sagar Shrikant Kadam · Sun Jun 28 07:45:00 2020 -0700
  9. d11b582 riscv: Add device tree for K210 and Sipeed Maix BitM by Sean Anderson · Wed Jun 24 06:41:23 2020 -0400
  10. e00653c riscv: sifive: fu540: add SPL configuration by Pragnesh Patel · Fri May 29 11:33:35 2020 +0530
  11. 01ec498 riscv: dts: sifive: Sync hifive-unleashed-a00 dts from linux by Pragnesh Patel · Fri May 29 11:33:33 2020 +0530
  12. bb337f9 riscv: sifive: dts: fu540: set ethernet clock rate by Pragnesh Patel · Fri May 29 11:33:32 2020 +0530
  13. 45ffc91 riscv: sifive: dts: fu540: add U-Boot dmc node by Pragnesh Patel · Fri May 29 11:33:28 2020 +0530
  14. 8f4a403 sifive: dts: fu540: Add DDR controller and phy register settings by Pragnesh Patel · Fri May 29 11:33:27 2020 +0530
  15. b65f19f riscv: sifive: dts: fu540: Add board -u-boot.dtsi files by Pragnesh Patel · Fri May 29 11:33:25 2020 +0530
  16. 2a449a3 riscv: sifive: fu540: Use OTP DM driver for serial environment variable by Pragnesh Patel · Fri May 29 11:33:22 2020 +0530
  17. 76c8522 sifive: fu540: Enable spi-nor flash support by Jagan Teki · Wed Apr 29 21:03:53 2020 +0530
  18. 0c2964b riscv: dts: hifive-unleashed-a00: Add -u-boot.dtsi by Jagan Teki · Thu Apr 23 22:30:56 2020 +0530
  19. 314d3ef riscv: dts: Add #address-cells and #size-cells in nor node by Rick Chen · Thu Nov 14 13:52:29 2019 +0800
  20. 3209fb8 riscv: dts: Support four cores SMP by Rick Chen · Thu Nov 14 13:52:28 2019 +0800
  21. a8ed626 riscv: dts: Add hifive-unleashed-a00 dts from Linux by Jagan Teki · Mon Nov 18 16:59:40 2019 +0530
  22. 5ff8f41 riscv: dts: move out AE350 L2 node from cpus node by Rick Chen · Wed Aug 28 18:46:10 2019 +0800
  23. a009fa7 dts: switch spi-flash to jedec, spi-nor compatible by Neil Armstrong · Sun Feb 10 10:16:20 2019 +0000
  24. 5ca381e riscv: dts: fix CONFIG_DEFAULT_DEVICE_TREE failure by Rick Chen · Wed Apr 03 10:43:37 2019 +0800
  25. 5e56cda riscv: dts: ae350 support SMP by Rick Chen · Tue Apr 02 15:56:43 2019 +0800
  26. f331b9b riscv: Remove ae350.dts by Bin Meng · Wed Dec 12 06:12:47 2018 -0800
  27. baaa062 riscv: dts: Add ae350_32.dts for RV32I by Rick Chen · Tue Nov 13 16:33:29 2018 +0800
  28. 2dab6d4 riscv: dts: Sync to Linux Kernel ae350 dts. by Rick Chen · Tue Nov 13 15:13:34 2018 +0800
  29. 6e1033f riscv: ae350: Clean up mixed tabs and spaces in the dts by Bin Meng · Wed Sep 26 06:55:18 2018 -0700
  30. ed4a3b3 riscv: dts: Support cfi flash by Rick Chen · Tue May 29 11:05:54 2018 +0800
  31. c7cccef riscv: dts: Sync DT with Linux Kernel by Rick Chen · Tue May 29 10:53:41 2018 +0800
  32. b66af37 riscv: cpu: nx25: Rename as ax25 by Rick Chen · Tue May 29 09:54:40 2018 +0800
  33. 10e4779 SPDX: Convert all of our single license tags to Linux Kernel style by Tom Rini · Sun May 06 17:58:06 2018 -0400
  34. ef6b196 riscv: dts: AE250 support sd High-Speed mode by Rick Chen · Mon Dec 25 17:05:39 2017 +0800
  35. 2e4fc1b riscv: nx25: dts: Add AE250 dts to support RISC-V by Rick Chen · Tue Dec 26 13:55:50 2017 +0800