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git01.mediatek.com
/
filogic
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uboot
/
3a028c28eedd4277a9c1196a9fdbcb04a98d8d55
/
drivers
/
clk
/
renesas
/
r8a77965-cpg-mssr.c
7885dca
clk: renesas: Drop include common.h
by Marek Vasut
· Sun Jan 21 18:31:21 2024 +0100
68f8e87
clk: renesas: Synchronize R-Car R8A77965 M3-N clock tables with Linux 6.6.3
by Marek Vasut
· Sun Dec 03 14:15:14 2023 +0100
561e8be
clk: renesas: Synchronize R8A77965 M3-N clock tables with Linux 6.5.3
by Marek Vasut
· Sun Sep 17 16:11:30 2023 +0200
f6b3202
clk: renesas: Add and enable CPG reset driver
by Marek Vasut
· Thu Jan 26 21:02:03 2023 +0100
d5b2e95
clk: renesas: Synchronize R8A77965 M3-N clock tables with Linux 6.1.7
by Marek Vasut
· Thu Jan 26 21:01:52 2023 +0100
814217e
clk: renesas: Make reset controller modemr register offset configurable
by Marek Vasut
· Sun Apr 25 21:53:05 2021 +0200
0e8dcb7
clk: renesas: Synchronize R-Car Gen3 tables with Linux 5.12
by Marek Vasut
· Sun Apr 25 21:10:40 2021 +0200
22f9fc7
clk: renesas: Only ever access documented bits in clock driver teardown
by Marek Vasut
· Sat Apr 25 14:57:45 2020 +0200
8a2b47f
dm: treewide: Rename auto_alloc_size members to be shorter
by Simon Glass
· Thu Dec 03 16:55:17 2020 -0700
4dcacfc
common: Drop linux/bitops.h from common header
by Simon Glass
· Sun May 10 11:40:13 2020 -0600
7841483
clk: renesas: Synchronize Gen3 tables with Linux 5.0
by Marek Vasut
· Mon Mar 04 21:38:10 2019 +0100
98c2058
clk: renesas: Add R8A77965 clock tables
by Marek Vasut
· Mon Mar 04 13:36:13 2019 +0100