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git01.mediatek.com / filogic / uboot / 2a8450f8f946bd8a8f3b37dbfe24e24930eab11e / drivers / clk / renesas / rcar-gen3-cpg.h
  1. 86d59f3 clk: renesas: Add R8A779A0 clock tables by Hai Pham · 4 years, 4 months ago
  2. 0fbb8a7 clk: renesas: Handle R8A779A0 V3U clock types in Gen3 clock code by Marek Vasut · 3 years, 7 months ago
  3. 814217e clk: renesas: Make reset controller modemr register offset configurable by Marek Vasut · 3 years, 7 months ago
  4. 215de2b clk: renesas: Add support for RPCD2 clock by Hai Pham · 4 years, 4 months ago
  5. 0e8dcb7 clk: renesas: Synchronize R-Car Gen3 tables with Linux 5.12 by Marek Vasut · 3 years, 7 months ago
  6. 06c4f9b clk: renesas: Add R8A774A1 clock tables by Adam Ford · 4 years, 5 months ago
  7. 7841483 clk: renesas: Synchronize Gen3 tables with Linux 5.0 by Marek Vasut · 6 years ago
  8. 69459b2 clk: renesas: Add PE clock handling by Marek Vasut · 7 years ago
  9. 7ef12c2 clk: renesas: Pull Gen3 specific bits into separate header by Marek Vasut · 7 years ago