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git01.mediatek.com / filogic / uboot / 2a8450f8f946bd8a8f3b37dbfe24e24930eab11e / drivers / clk / renesas / r8a7796-cpg-mssr.c
  1. 814217e clk: renesas: Make reset controller modemr register offset configurable by Marek Vasut · 3 years, 7 months ago
  2. 0e8dcb7 clk: renesas: Synchronize R-Car Gen3 tables with Linux 5.12 by Marek Vasut · 3 years, 7 months ago
  3. 22f9fc7 clk: renesas: Only ever access documented bits in clock driver teardown by Marek Vasut · 4 years, 7 months ago
  4. 8a2b47f dm: treewide: Rename auto_alloc_size members to be shorter by Simon Glass · 4 years ago
  5. 4dcacfc common: Drop linux/bitops.h from common header by Simon Glass · 4 years, 7 months ago
  6. 7841483 clk: renesas: Synchronize Gen3 tables with Linux 5.0 by Marek Vasut · 6 years ago
  7. 98c2058 clk: renesas: Add R8A77965 clock tables by Marek Vasut · 6 years ago
  8. 10e4779 SPDX: Convert all of our single license tags to Linux Kernel style by Tom Rini · 7 years ago
  9. 284e94c clk: renesas: Add R8A77965 M3N entries by Marek Vasut · 7 years ago
  10. 2eb56a1 clk: renesas: Split SMSTPCR and RMSTPCR tables by Marek Vasut · 7 years ago
  11. 7ef12c2 clk: renesas: Pull Gen3 specific bits into separate header by Marek Vasut · 7 years ago
  12. 28f9004 clk: renesas: Make PLL configurations per-SoC by Marek Vasut · 7 years ago
  13. b923419 clk: renesas: Make clk_ids per-driver by Marek Vasut · 7 years ago
  14. 4eb4e6e clk: renesas: Split RCar Gen3 driver by Marek Vasut · 7 years ago