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git01.mediatek.com / filogic / uboot / 2093119075b5aa3b42b10ed834a12dc5b2846ffb / arch / riscv / dts / jh7110-starfive-visionfive-2.dtsi
  1. 021faf7 riscv: dts: starfive: Enable pcie0 dts node by Minda Chen · Mon Aug 07 16:53:36 2023 +0800
  2. 23dfd81 riscv: dts: starfive: Enable PCIe host controller by Mason Huo · Tue Jul 25 17:46:50 2023 +0800
  3. 1345c9e riscv: dts: jh7110: Add clock source from PLL by Xingyu Wu · Fri Jul 07 18:50:09 2023 +0800
  4. d426942 riscv: dts: starfive: Add support eeprom device tree node by Yanhong Wang · Thu Jun 15 17:36:49 2023 +0800
  5. 7f63bd9 riscv: dts: jh7110: Add ethernet device tree nodes by Yanhong Wang · Thu Jun 15 17:36:44 2023 +0800
  6. 5efc934 riscv: dts: jh7110: Add initial StarFive VisionFive v2 board device tree by Yanhong Wang · Wed Mar 29 11:42:23 2023 +0800