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git01.mediatek.com / filogic / uboot / 1a25236f2ab5689bdafafbe255419ea75730d786 / arch / arm / include / asm / arch-sunxi
  1. 27fc8b0 sunxi: fix sid base address macro name for H6 by Icenowy Zheng · Sat Aug 18 13:36:44 2018 +0800
  2. 4e287f6 sunxi: add DRAM support to H6 by Icenowy Zheng · Mon Jul 23 06:13:34 2018 +0800
  3. a838a15 sunxi: add MMC support for H6 by Icenowy Zheng · Sat Jul 21 16:20:29 2018 +0800
  4. a78bb07 sunxi: add UART0 setup for H6 by Icenowy Zheng · Sat Jul 21 16:20:28 2018 +0800
  5. 5a76cdd sunxi: use sun6i-style watchdog for H6 by Icenowy Zheng · Sat Jul 21 16:20:27 2018 +0800
  6. d1fa87d sunxi: add clock code for H6 by Icenowy Zheng · Sat Jul 21 16:20:26 2018 +0800
  7. bb769d6 sunxi: change RMR64's RVBAR address for H6 by Icenowy Zheng · Sat Jul 21 16:20:22 2018 +0800
  8. e1cf4ad sunxi: add basic memory map definitions of H6 SoC by Icenowy Zheng · Sat Jul 21 16:20:21 2018 +0800
  9. 5e6dd27 sunxi: change SUNXI_HIGH_SRAM option to SUNXI_SRAM_ADDRESS by Icenowy Zheng · Sat Jul 21 16:20:20 2018 +0800
  10. 30213a2 sunxi: R40: add gigabit ethernet clocks by Lothar Felten · Fri Jul 13 10:45:25 2018 +0200
  11. 17970334 usb: sunxi: Use proper reg_mask for clock gate, reset by Jagan Teki · Thu Jun 28 19:40:46 2018 +0530
  12. 9ae2306 sunxi: Fix USB PHY index for H3 by Jagan Teki · Thu Jun 28 19:40:45 2018 +0530
  13. c4d3ae9 sunxi: clock: Fix EHCI and OHCI clocks on A64 by Vasily Khoruzhick · Thu Jun 07 19:23:38 2018 -0700
  14. 1f03161 sunxi: Drop legacy usb_phy.c by Jagan Teki · Fri May 25 15:32:17 2018 +0530
  15. 5cc66f0 sunxi: clock: Fix OHCI clock gating for H3/H5 by Chen-Yu Tsai · Mon May 07 13:03:24 2018 +0530
  16. 75fa310 sunxi: clock: Fix clock gating for H3/H5/A64 by Jagan Teki · Mon May 07 13:03:21 2018 +0530
  17. 86a38e5 pwm: sunxi: add support for PWM found on Allwinner A64 by Vasily Khoruzhick · Mon May 14 08:16:20 2018 -0700
  18. 10e4779 SPDX: Convert all of our single license tags to Linux Kernel style by Tom Rini · Sun May 06 17:58:06 2018 -0400
  19. 78f1099 sunxi: allow NAND support to be compiled for sun8i platforms by Miquel Raynal · Wed Feb 28 20:51:57 2018 +0100
  20. 14fecf9 bitops: collect BIT macros to include/linux/bitops.h by Masahiro Yamada · Wed Nov 22 02:38:11 2017 +0900
  21. 32a7414 Merge git://git.denx.de/u-boot-video by Tom Rini · Sun Oct 29 10:11:08 2017 -0400
  22. f079f93 sunxi: video: split out PLL configuration code by Vasily Khoruzhick · Thu Oct 26 21:51:51 2017 -0700
  23. 8a368b7 sunxi: clk: fix N formula for CPUX clocks by Quentin Schulz · Tue Sep 26 16:02:47 2017 +0200
  24. 1941be8 arm: sunxi: Move spl_boot_device in a separate function by Maxime Ripard · Wed Aug 23 10:06:30 2017 +0200
  25. 847bcf0 musb: sunxi: switch to the device model by Maxime Ripard · Tue Sep 05 22:10:35 2017 +0200
  26. dc1436c sunxi: Fix CONFIG_SUNXI_GMAC references by Dave Prue · Thu Aug 31 19:21:01 2017 +0200
  27. 95e3470 mmc: sunxi: Support new mode by Maxime Ripard · Wed Aug 23 12:03:41 2017 +0200
  28. e2a84a5 sunxi: add PRCM secure switch register definition by Icenowy Zheng · Thu Jul 20 14:00:31 2017 +0800
  29. b34207f Merge branch 'master' of git://git.denx.de/u-boot-sunxi by Tom Rini · Mon Jun 19 08:08:40 2017 -0400
  30. b8f7cab sunxi: video: Add support for CSC and TVE to DE2 driver by Jernej Skrabec · Fri May 19 17:41:16 2017 +0200
  31. a354082 sunxi: Add base address for TV encoder by Jernej Skrabec · Fri May 19 17:41:15 2017 +0200
  32. f09b48e sunxi: Add selective DRAM type and timing by Icenowy Zheng · Sat Jun 03 17:10:18 2017 +0800
  33. 4323a8f sunxi: Rename bus-width related macros in H3 DRAM code by Icenowy Zheng · Sat Jun 03 17:10:15 2017 +0800
  34. ca0bc02 sunxi: makes an invisible option for H3-like DRAM controllers by Icenowy Zheng · Sat Jun 03 17:10:14 2017 +0800
  35. 6b0cd01 sunxi: Store the device tree name in the SPL header by Siarhei Siamashka · Wed Apr 26 01:32:49 2017 +0100
  36. 48edd46 sunxi: Add clock support for TV encoder by Jernej Skrabec · Wed May 10 18:46:29 2017 +0200
  37. 8531d08 sunxi: video: Split out TVE code by Jernej Skrabec · Wed May 10 18:46:28 2017 +0200
  38. 3279661 sunxi: add clock configuration of R40 sata by Icenowy Zheng · Mon May 01 14:31:56 2017 +0800
  39. 8d91b46 sunxi: video: Add A64/H3/H5 HDMI driver by Jernej Skrabec · Mon Mar 27 19:22:32 2017 +0200
  40. 52e6188 sunxi: add basic V3s support by Icenowy Zheng · Sat Apr 08 15:30:12 2017 +0800
  41. 9b4ca92 sunxi: Add clock support for DE2/HDMI/TCON on newer SoCs by Jernej Skrabec · Mon Mar 27 19:22:31 2017 +0200
  42. ccfbe5f sunxi: video: Convert lcdc to use struct display_timing by Jernej Skrabec · Mon Mar 27 19:22:30 2017 +0200
  43. 2e0a1f3 sunxi: video: Split out TCON code by Jernej Skrabec · Mon Mar 27 19:22:29 2017 +0200
  44. 167bff5 sunxi: Fix CPUCFG address for R40 by Chen-Yu Tsai · Wed Mar 01 13:52:09 2017 +0800
  45. 143ef79 sunxi: Use H3/A64 DRAM initialization code for R40 by Chen-Yu Tsai · Thu Dec 01 19:09:57 2016 +0800
  46. 5eddcbb sunxi: Set PLL lock enable bits for R40 by Chen-Yu Tsai · Wed Nov 30 16:54:34 2016 +0800
  47. 84f3bb4 sunxi: Fix watchdog reset function for R40 by Chen-Yu Tsai · Wed Nov 30 16:27:14 2016 +0800
  48. 5fb9743 sunxi: prepare for sharing MACH_SUN8I_H3 config symbol by Andre Przywara · Thu Feb 16 01:20:27 2017 +0000
  49. 5d0d28f sunxi: DRAM: add Allwinner H5 support by Andre Przywara · Thu Feb 16 01:20:26 2017 +0000
  50. de454ec sunxi: Kconfig: introduce CONFIG_SUNXI_HIGH_SRAM by Andre Przywara · Thu Feb 16 01:20:23 2017 +0000
  51. f613817 sunxi: A64: use H3 DRAM initialization code for A64 as well by Jens Kuske · Mon Jan 02 11:48:42 2017 +0000
  52. 3e79758 sunxi: H3: add and rename some DRAM contoller registers by Jens Kuske · Mon Jan 02 11:48:39 2017 +0000
  53. 46c3d99 sunxi: A64: do an RMR switch if started in AArch32 mode by Andre Przywara · Mon Jan 02 11:48:36 2017 +0000
  54. f66cee3 ARM: boot0 hook: remove macro, include whole header file by Andre Przywara · Mon Jan 02 11:48:34 2017 +0000
  55. 313a578 armv8: move reset branch into boot hook by Andre Przywara · Mon Jan 02 11:48:33 2017 +0000
  56. 1c40fed sunxi: fix SID read on H3 by Icenowy Zheng · Tue Dec 20 02:03:36 2016 +0800
  57. a7c455f sunxi: Add support for SID e-fuses on sun9i by Chen-Yu Tsai · Fri Oct 28 18:21:35 2016 +0800
  58. d7c0efb sunxi: add initial clock setup for sun9i for SPL by Philipp Tomsich · Fri Oct 28 18:21:31 2016 +0800
  59. 3015e04 sunxi: add gtbus-initialisation for sun9i by Philipp Tomsich · Fri Oct 28 18:21:29 2016 +0800
  60. d36af1c sunxi: DRAM initialisation for sun9i by Philipp Tomsich · Fri Oct 28 18:21:28 2016 +0800
  61. bd732d0 sunxi: A64: enable USB support by Amit Singh Tomar · Fri Oct 21 02:24:30 2016 +0100
  62. d64afdc sunxi: musb: Power off OTG port VBUS when disabled by Chen-Yu Tsai · Wed Sep 07 14:25:21 2016 +0800
  63. 213407e sunxi: Tune H3 DRAM PLL to improve lock time by Jens Kuske · Fri Aug 19 13:40:46 2016 +0200
  64. 663ae65 sunxi: display: Use PWM to drive backlight where applicable by Hans de Goede · Fri Aug 19 15:25:41 2016 +0200
  65. f1fc8a0 sunxi: Add missing macros to configure the NAND controller clk by Boris Brezillon · Wed Jun 15 21:09:21 2016 +0200
  66. 6527fa2 sunxi: Use BROM stored boot_media value to determine our boot-source by Hans de Goede · Sat Jul 09 15:31:47 2016 +0200
  67. d194c0e net: Add EMAC driver for H3/A83T/A64 SoCs. by Amit Singh Tomar · Wed Jul 06 17:59:44 2016 +0530
  68. e9bbbe8 sunxi: FEL - Add the ability to recognize and auto-import uEnv-style data by Bernhard Nortmann · Thu Jun 09 07:37:35 2016 +0200
  69. 6f3ea20 sunxi: Support booting from SPI flash by Siarhei Siamashka · Tue Jun 07 14:28:34 2016 +0300
  70. ec380a0 sunxi: Add missing boot_media fields in the SPL header by Olliver Schinagl · Mon Jun 13 18:13:07 2016 +0200
  71. 9bffa7f sunxi: Add base address for GIC by Chen-Yu Tsai · Tue Jun 07 10:54:33 2016 +0800
  72. f3a80e2 sunxi: Add CPUCFG debug lock and sun7i cpu power controls by Chen-Yu Tsai · Tue Jun 07 10:54:32 2016 +0800
  73. fcd4c4e sunxi: Group cpu core related controls together by Chen-Yu Tsai · Tue Jun 07 10:54:31 2016 +0800
  74. d14dcb0 sunxi: Add missing linux/types.h header for cpucfg_sun6i.h by Chen-Yu Tsai · Tue Jun 07 10:54:30 2016 +0800
  75. 165ab87 sunxi: Add packed attribute to struct sunxi_prcm_reg by Chen-Yu Tsai · Tue Jun 07 10:54:29 2016 +0800
  76. 8ba7974 sunxi: Make CPUCFG_BASE macro names the same across families by Chen-Yu Tsai · Tue Jun 07 10:54:28 2016 +0800
  77. 2c885e9 sunxi: Downclock AHB1 to 100MHz on Allwinner A64 by Siarhei Siamashka · Tue May 31 01:48:05 2016 +0300
  78. 48321ba arm/arm64: implement a boot header capability by Andre Przywara · Tue May 31 10:45:06 2016 -0700
  79. 08e978b sunxi: Increase SPL header size to 64 bytes to avoid code corruption by Siarhei Siamashka · Sat May 14 04:13:26 2016 +0300
  80. 26c50fb sunxi: Add support for Allwinner A64 SoCs by Siarhei Siamashka · Tue Mar 29 17:29:10 2016 +0200
  81. dc87eeb sunxi: clk: Fix USB PHY clock macros for A83T by Chen-Yu Tsai · Wed Mar 30 00:26:52 2016 +0800
  82. 42cbbe3 sunxi: Fix gmac not working due to cpu_eth_init no longer being called by Hans de Goede · Thu Mar 17 13:53:03 2016 +0100
  83. 7d7b685 sunxi: Support SID e-fuses on A83T and H3 by Chen-Yu Tsai · Wed Jan 27 16:34:43 2016 +0800
  84. a1f5d11 sunxi: H3: Add support for the host usb-phys by Jelle van der Waa · Tue Feb 09 23:59:33 2016 +0100
  85. ad8baac sunxi: Add support for LPDDR3 for A83T by Vishnu Patekar · Tue Jan 12 01:20:59 2016 +0800
  86. c49936f sunxi: Groundwork to support new dram type for A83T by Vishnu Patekar · Tue Jan 12 01:20:58 2016 +0800
  87. 6daddfe sunxi: Support H3 CCU security switches by Chen-Yu Tsai · Wed Jan 06 15:13:07 2016 +0800
  88. 0932b63 sunxi: Support Secure Memory Touch Arbiter (SMTA) in sun8i H3 by Chen-Yu Tsai · Wed Jan 06 15:13:06 2016 +0800
  89. 8d3d7c1 sunxi: Add support for the I2C controller which is part of the PRCM by Jelle van der Waa · Thu Jan 14 14:06:26 2016 +0100
  90. e302fe6 sunxi: Add support for Allwinner A83T DRAM by vishnupatekar · Sun Nov 29 01:07:25 2015 +0800
  91. 39754b6 sunxi: clk: add basic clocks for A83T by vishnupatekar · Sun Nov 29 01:07:24 2015 +0800
  92. 133bfbe sunxi: Add support for UART0 in PB pin group on A83T by vishnupatekar · Sun Nov 29 01:07:20 2015 +0800
  93. ff308f8 sunxi: Set AHB1 clock to PLL6/3 on all clock_sun6i.h using SoCs by Hans de Goede · Fri Nov 20 19:29:49 2015 +0100
  94. 2b8bd91 sunxi: clock: Set AHB1 clock frequency to 200MHz on Allwinner H3 by Siarhei Siamashka · Fri Nov 20 07:07:48 2015 +0200
  95. 53f018e sunxi: Add H3 DRAM initialization support by Jens Kuske · Tue Nov 17 15:12:59 2015 +0100
  96. f977072 sunxi: Add basic H3 support by Jens Kuske · Tue Nov 17 15:12:58 2015 +0100
  97. ead498a sunxi: retrieve FEL-provided values to environment variables by Bernhard Nortmann · Thu Sep 17 18:52:52 2015 +0200
  98. 01ad493 sunxi: (mksunxiboot) signature to indicate "sunxi" SPL variant by Bernhard Nortmann · Thu Sep 17 18:52:51 2015 +0200
  99. c9e8961 sunxi: move SPL-related definitions to platform-specific include by Bernhard Nortmann · Thu Sep 17 18:52:50 2015 +0200
  100. fcc7b70 sunxi: Enable non-secure access to RTC on sun6i (A31s) by Chen-Yu Tsai · Tue Aug 25 10:49:19 2015 +0800