Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / 154bdbf3e99416aab881b3aea89fcb560b305f16 / drivers / clk / renesas / r8a7790-cpg-mssr.c
  1. 7885dca clk: renesas: Drop include common.h by Marek Vasut · Sun Jan 21 18:31:21 2024 +0100
  2. 23cbd51 clk: renesas: Synchronize R8A7790 H2 clock tables with Linux 6.5.3 by Marek Vasut · Sun Sep 17 16:11:24 2023 +0200
  3. 814217e clk: renesas: Make reset controller modemr register offset configurable by Marek Vasut · Sun Apr 25 21:53:05 2021 +0200
  4. aac4de2 clk: renesas: Synchronize R-Car Gen2 tables with Linux 5.12 by Marek Vasut · Sun Apr 25 21:09:10 2021 +0200
  5. 5af8b6a clk: renesas: Synchronize Gen2 MSTP teardown tables by Marek Vasut · Sat Jun 06 15:26:14 2020 +0200
  6. 8a2b47f dm: treewide: Rename auto_alloc_size members to be shorter by Simon Glass · Thu Dec 03 16:55:17 2020 -0700
  7. 4dcacfc common: Drop linux/bitops.h from common header by Simon Glass · Sun May 10 11:40:13 2020 -0600
  8. 3bee488 clk: renesas: Synchronize Gen2 tables with Linux 5.0 by Marek Vasut · Mon Mar 04 21:23:25 2019 +0100
  9. f40c4cf clk: renesas: Minor clean up of the R8A7790 clock driver by Marek Vasut · Thu Apr 12 15:23:46 2018 +0200
  10. b8379d6 clk: renesas: Import R8A7790 H2 clock tables by Marek Vasut · Wed Jan 17 23:14:25 2018 +0100