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git01.mediatek.com / filogic / uboot / 111b8046f0bc0a6ba059b829cc542db8dbf8ca2d / arch / riscv / cpu / start.S
  1. 111b804 riscv: Provide a mechanism to fix DT for reserved memory by Atish Patra · 4 years, 7 months ago
  2. b161f90 riscv: Introduce SPL_SMP Kconfig option for U-Boot SPL by Bin Meng · 4 years, 8 months ago
  3. 88fc2a5 riscv: Merge unnecessary SMP ifdefs in start.S by Bin Meng · 4 years, 8 months ago
  4. 750fee5 riscv: Remove unnecessary instruction by Sean Anderson · 4 years, 10 months ago
  5. 284f71b common: Move relocate_code() to init.h by Simon Glass · 5 years ago
  6. c308e01 riscv: add option to wait for ack from secondary harts in smp functions by Lukas Auer · 5 years ago
  7. 55bc1bd riscv: Fix clear bss loop in the start-up code by Rick Chen · 5 years ago
  8. b9ad45d riscv: update fix_rela_dyn by Marcus Comstedt · 5 years ago
  9. 2a2a925 riscv: support SPL stack and global data relocation by Lukas Auer · 5 years ago
  10. 396f0bd riscv: add SPL support by Lukas Auer · 5 years ago
  11. 6134659 riscv: add run mode configuration for SPL by Lukas Auer · 5 years ago
  12. f942636 riscv: Access CSRs using CSR numbers by Bin Meng · 5 years ago
  13. 3043b90 riscv: prior_stage_fdt_address should only be used when OF_PRIOR_STAGE is enabled by Rick Chen · 6 years ago
  14. e5e6c36 riscv: Introduce CONFIG_XIP to support booting from flash by Rick Chen · 6 years ago
  15. cddde09 riscv: hang if relocation of secondary harts fails by Lukas Auer · 6 years ago
  16. 9ebf294 riscv: do not rely on hart ID passed by previous boot stage by Lukas Auer · 6 years ago
  17. a359665 riscv: add support for multi-hart systems by Lukas Auer · 6 years ago
  18. 8de4b3e riscv: save hart ID in register tp instead of s0 by Lukas Auer · 6 years ago
  19. 01558e2 riscv: delay initialization of caches and debug UART by Lukas Auer · 6 years ago
  20. 89681a7 riscv: Save boot hart id to the global data by Bin Meng · 6 years ago
  21. 2e128a7 riscv: Move trap handler codes to mtrap.S by Bin Meng · 6 years ago
  22. 2a21815 riscv: ax25-ae350: Pass dtb address to u-boot with a1 register by Rick Chen · 6 years ago
  23. 89b3934 riscv: Add kconfig option to run U-Boot in S-mode by Anup Patel · 6 years ago
  24. 842d580 riscv: cache: Implement i/dcache [status, enable, disable] by Rick Chen · 6 years ago
  25. 39a652b riscv: save hart ID and device tree passed by prior boot stage by Lukas Auer · 6 years ago
  26. 8598e6b riscv: do not blindly modify the mstatus CSR by Lukas Auer · 6 years ago
  27. 230ab8a riscv: remove unused labels in start.S by Lukas Auer · 6 years ago
  28. ccd035a Drop CONFIG_INIT_CRITICAL by Bin Meng · 6 years ago
  29. af51285 riscv: align mtvec on a 4-byte boundary by Lukas Auer · 6 years ago
  30. 7cf4368 riscv: fix inconsistent use of spaces and tabs in start.S by Lukas Auer · 6 years ago
  31. bcb3843 riscv: Make start.S available for all targets by Bin Meng · 6 years ago[Renamed from arch/riscv/cpu/ax25/start.S]
  32. b66af37 riscv: cpu: nx25: Rename as ax25 by Rick Chen · 7 years ago[Renamed from arch/riscv/cpu/nx25/start.S]
  33. 10e4779 SPDX: Convert all of our single license tags to Linux Kernel style by Tom Rini · 7 years ago
  34. 40a6fe7 riscv: ae250: Support DT provided by the board at runtime by Rick Chen · 7 years ago
  35. e76b804 riscv: cpu: Add nx25 to support RISC-V by Rick Chen · 7 years ago