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filogic
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uboot
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0e4f80011978ec70002f425a78dc0e8b9babe28d
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drivers
/
fpga
/
zynqpl.c
f46ccf4
fpga: zynqpl: Clean partial bitstream handling
by Michal Simek
· Fri May 02 14:15:27 2014 +0200
1466365
fpga: Define bitstream type based on command selection
by Michal Simek
· Fri May 02 14:09:30 2014 +0200
7857c72
fpga: zynq: Use helper function zynq_validate_bitstream
by Siva Durga Prasad Paladugu
· Thu Mar 13 11:57:34 2014 +0530
2f72618
fpga: zynq: Use helper functions for zynq dma
by Siva Durga Prasad Paladugu
· Wed Mar 12 17:09:26 2014 +0530
15f156a
fpga: zynq: Remove sparse warnings
by Michal Simek
· Fri Apr 25 13:51:58 2014 +0200
75fafac
fpga: xilinx: Simplify load/dump/info function handling
by Michal Simek
· Thu Mar 13 13:07:57 2014 +0100
25e1e2e
fpga: xilinx: Avoid CamelCase for in Xilinx_desc
by Michal Simek
· Thu Mar 13 12:49:21 2014 +0100
267d8e2
sizes.h - consolidate for all architectures
by Alexey Brodkin
· Wed Feb 26 17:47:58 2014 +0400
cbe4b09
fpga: zynq: Correct fpga load when buf is not aligned
by Novasys Ingenierie
· Wed Nov 27 09:03:01 2013 +0100
94dc92f
fpga: zynqpl: Do not place bitstream below 1MB
by Michal Simek
· Fri Oct 04 10:48:59 2013 +0200
8cfb246
fpga: zynqpl: Add dcache flush support
by Jagannadha Sutradharudu Teki
· Fri Sep 20 18:39:47 2013 +0530
bd8ec7e
Coding Style cleanup: remove trailing white space
by Wolfgang Denk
· Mon Oct 07 13:07:26 2013 +0200
5577585
fpga: zynqpl: Clear loopback mode during device init
by Soren Brinkmann
· Fri Jun 14 17:43:24 2013 -0700
52f91b5
fpga: zynqpl: Add support for zc7100 device.
by Michal Simek
· Mon Jun 17 13:54:07 2013 +0200
d79de1d
Add GPL-2.0+ SPDX-License-Identifier to source files
by Wolfgang Denk
· Mon Jul 08 09:37:19 2013 +0200
15d654c
fpga: zynq: Add support for loading bitstream
by Michal Simek
· Mon Apr 22 15:43:02 2013 +0200