Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / 0562f0d6994468d3831791414875f62970f476ff / drivers / ddr / altera
  1. 66acabc ddr: altera: Repair DQ window centering code by Marek Vasut · Tue Apr 05 23:17:35 2016 +0200
  2. a4b9fa1 ddr: altera: Staticize global variables by Marek Vasut · Tue Apr 05 11:18:38 2016 +0200
  3. 4df2d7b ddr: altera: Make DLEVEL behavior inclusive by Marek Vasut · Mon Apr 04 21:21:05 2016 +0200
  4. f4d3862 ddr: altera: Zero DM IN delay in scc_mgr_zero_group() by Marek Vasut · Mon Apr 04 21:16:18 2016 +0200
  5. 2bf2ee5 ddr: altera: Remove unnecessary ODT mode config by Marek Vasut · Mon Apr 04 19:10:12 2016 +0200
  6. acee8fd ddr: altera: Remove unnecessary update of the SCC by Marek Vasut · Mon Apr 04 18:41:53 2016 +0200
  7. 12361a2 ddr: altera: Fix DRAM end value in protection rule by Marek Vasut · Mon Apr 04 17:52:21 2016 +0200
  8. 45ce296 ddr: altera: Fix scc_mgr_set() argument order by Marek Vasut · Mon Apr 04 17:28:16 2016 +0200
  9. 6946989 ddr: altera: Tweak DQS tracking enable handling by Marek Vasut · Tue Apr 05 23:41:56 2016 +0200
  10. 2654bc9 ddr: altera: Replace ad-hoc constant with macro by Marek Vasut · Mon Apr 04 16:07:11 2016 +0200
  11. 42aa46d ddr: altera: Init the rule ID in debug code by Marek Vasut · Tue Dec 29 09:38:52 2015 +0100
  12. eb447cb ddr: altera: Repair uninited variable by Marek Vasut · Mon Aug 10 23:01:43 2015 +0200
  13. af67cf3 ddr: altera: Replace float multiplication with integer one by Marek Vasut · Mon Aug 10 22:50:11 2015 +0200
  14. c85b9b3 ddr: altera: sequencer: Clean checkpatch issues by Marek Vasut · Sun Aug 02 19:47:01 2015 +0200
  15. 8af9ca0 ddr: altera: sequencer: Clean data types by Marek Vasut · Sun Aug 02 19:42:26 2015 +0200
  16. 5867376 ddr: altera: sequencer: Pluck out misc macros from code by Marek Vasut · Sun Aug 02 19:26:55 2015 +0200
  17. 324d3f7 ddr: altera: sequencer: Zap SEQ_T(INIT|RESET)_CNTR._VAL by Marek Vasut · Sun Aug 02 19:24:12 2015 +0200
  18. 32d813e ddr: altera: sequencer: Zap VFIFO_SIZE by Marek Vasut · Sun Aug 02 19:21:56 2015 +0200
  19. f00a6ea ddr: altera: sequencer: Wrap misc remaining macros by Marek Vasut · Sun Aug 02 19:18:47 2015 +0200
  20. 7e8f8a7 ddr: altera: sequencer: Pluck out IO_* macros from code by Marek Vasut · Sun Aug 02 19:10:58 2015 +0200
  21. 3bf9204 ddr: altera: sequencer: Wrap IO_* macros by Marek Vasut · Sun Aug 02 19:00:23 2015 +0200
  22. 2dfc76b ddr: altera: sequencer: Pluck out RW_MGR_* macros from code by Marek Vasut · Sun Aug 02 18:44:06 2015 +0200
  23. 39b620e ddr: altera: sequencer: Wrap RW_MGR_* macros by Marek Vasut · Sun Aug 02 18:12:08 2015 +0200
  24. 3384e74 ddr: altera: sequencer: Wrap ac_rom_init and inst_rom_init by Marek Vasut · Sun Aug 02 17:15:19 2015 +0200
  25. 42ed1f2 ddr: altera: sequencer: Zap bogus redefinition of RW_MGR_MEM_NUMBER_OF_RANKS by Marek Vasut · Sun Aug 02 18:40:27 2015 +0200
  26. eb98b38 ddr: altera: sequencer: Zap unused params and macros by Marek Vasut · Sun Aug 02 18:27:21 2015 +0200
  27. 662a8a6 ddr: altera: sequencer: Move qts-generated files to board dir by Marek Vasut · Sun Aug 02 16:55:45 2015 +0200
  28. 6772cd9 ddr: altera: sdram: Make sdram_start and sdram_end into u32 by Marek Vasut · Sat Aug 01 23:12:11 2015 +0200
  29. 9114407 ddr: altera: sdram: Minor cleanup in sdram_get_rule() by Marek Vasut · Sat Aug 01 23:21:23 2015 +0200
  30. 7fce5bc ddr: altera: sdram: Minor cleanup in sdram_set_rule() by Marek Vasut · Sat Aug 01 22:40:48 2015 +0200
  31. b0d848c ddr: altera: sdram: Add missing kerneldoc by Marek Vasut · Sat Aug 01 22:28:30 2015 +0200
  32. 116d88f ddr: altera: sdram: Clean up sdram_write_verify() by Marek Vasut · Sat Aug 01 22:26:11 2015 +0200
  33. 1796a09 ddr: altera: sdram: Clean up sdram_calculate_size() part 2 by Marek Vasut · Sat Aug 01 21:47:16 2015 +0200
  34. 6d6fbba ddr: altera: sdram: Clean up sdram_calculate_size() part 1 by Marek Vasut · Sat Aug 01 21:44:00 2015 +0200
  35. 32ada57 ddr: altera: sdram: Introduce socfpga_sdram_get_config() by Marek Vasut · Sat Aug 01 21:35:18 2015 +0200
  36. 1b1cc10 ddr: altera: sdram: Clean up sdram_mmr_init_full() part 8 by Marek Vasut · Sat Aug 01 22:25:29 2015 +0200
  37. 5a4e8ed ddr: altera: sdram: Clean up sdram_mmr_init_full() part 7 by Marek Vasut · Sat Aug 01 22:03:48 2015 +0200
  38. b81f11c ddr: altera: sdram: Clean up sdram_mmr_init_full() part 6 by Marek Vasut · Sat Aug 01 21:26:55 2015 +0200
  39. 1e271e4 ddr: altera: sdram: Clean up sdram_mmr_init_full() part 5 by Marek Vasut · Sat Aug 01 21:24:31 2015 +0200
  40. 71c1a00 ddr: altera: sdram: Clean up sdram_mmr_init_full() part 4 by Marek Vasut · Sat Aug 01 21:21:21 2015 +0200
  41. 3a07911 ddr: altera: sdram: Clean up sdram_mmr_init_full() part 3 by Marek Vasut · Sat Aug 01 21:16:20 2015 +0200
  42. 7697ff7 ddr: altera: sdram: Clean up sdram_mmr_init_full() part 2 by Marek Vasut · Sat Aug 01 20:58:44 2015 +0200
  43. 4fccfa4 ddr: altera: sdram: Clean up sdram_mmr_init_full() part 1 by Marek Vasut · Sat Aug 01 20:39:46 2015 +0200
  44. 4f3adbf ddr: altera: sdram: Introduce socfpga_sdram_config() structure by Marek Vasut · Sat Aug 01 20:30:10 2015 +0200
  45. 92e8e6f ddr: altera: sdram: Clean up set_sdr_mp_threshold() by Marek Vasut · Sat Aug 01 20:14:11 2015 +0200
  46. 44f09cc ddr: altera: sdram: Clean up set_sdr_mp_pacing() by Marek Vasut · Sat Aug 01 20:12:31 2015 +0200
  47. b933b19 ddr: altera: sdram: Clean up set_sdr_mp_weight() by Marek Vasut · Sat Aug 01 20:10:23 2015 +0200
  48. f904a86 ddr: altera: sdram: Clean up set_sdr_fifo_cfg() by Marek Vasut · Sat Aug 01 20:04:33 2015 +0200
  49. 9d64f19 ddr: altera: sdram: Clean up set_sdr_static_cfg() by Marek Vasut · Sat Aug 01 20:04:19 2015 +0200
  50. 820b0d9 ddr: altera: sdram: Clean up set_sdr_addr_rw() by Marek Vasut · Sat Aug 01 19:50:56 2015 +0200
  51. 6e9af9b ddr: altera: sdram: Clean up set_sdr_dram_timing*() by Marek Vasut · Sat Aug 01 19:45:24 2015 +0200
  52. 82a2764 ddr: altera: sdram: Clean up set_sdr_ctrlcfg() by Marek Vasut · Sat Aug 01 19:33:40 2015 +0200
  53. 724c50f ddr: altera: sdram: Clean up compute_errata_rows() part 2 by Marek Vasut · Sat Aug 01 19:20:19 2015 +0200
  54. 186880e ddr: altera: sdram: Clean up compute_errata_rows() part 1 by Marek Vasut · Sat Aug 01 18:54:34 2015 +0200
  55. 2fda506 ddr: altera: sdram: Switch to generic_hweight32() by Marek Vasut · Sat Aug 01 18:46:55 2015 +0200
  56. 98d279a ddr: altera: Clean up of delay_for_n_mem_clocks() part 5 by Marek Vasut · Sun Jul 26 11:46:04 2015 +0200
  57. 7574c87 ddr: altera: Clean up of delay_for_n_mem_clocks() part 4 by Marek Vasut · Sun Jul 26 11:44:54 2015 +0200
  58. 13ee438 ddr: altera: Clean up of delay_for_n_mem_clocks() part 3 by Marek Vasut · Sun Jul 26 11:42:53 2015 +0200
  59. 4b203df ddr: altera: Clean up of delay_for_n_mem_clocks() part 2 by Marek Vasut · Sun Jul 26 11:34:09 2015 +0200
  60. 50d7199 ddr: altera: Clean up of delay_for_n_mem_clocks() part 1 by Marek Vasut · Sun Jul 26 11:11:28 2015 +0200
  61. c140275 ddr: altera: Minor clean up of rw_mgr_mem_handoff() by Marek Vasut · Sun Jul 26 10:59:19 2015 +0200
  62. a358127 ddr: altera: Clean up rw_mgr_mem_calibrate_lfifo() by Marek Vasut · Tue Jul 21 06:18:57 2015 +0200
  63. 2da0257 ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_end() by Marek Vasut · Sat Jul 18 05:58:44 2015 +0200
  64. adbaa2d ddr: altera: Clean up rw_mgr_mem_calibrate_write_test_issue() by Marek Vasut · Tue Jul 21 06:00:36 2015 +0200
  65. c67d962 ddr: altera: Clean up rw_mgr_mem_calibrate_write_test() part 3 by Marek Vasut · Tue Jul 21 05:57:11 2015 +0200
  66. bc773a1 ddr: altera: Clean up rw_mgr_mem_calibrate_write_test() part 2 by Marek Vasut · Tue Jul 21 05:54:39 2015 +0200
  67. 0b97c42 ddr: altera: Clean up rw_mgr_mem_calibrate_write_test() part 1 by Marek Vasut · Tue Jul 21 05:43:37 2015 +0200
  68. 2595b24 ddr: altera: Clean up rw_mgr_mem_calibrate_writes_center() part 5 by Marek Vasut · Tue Jul 21 05:33:49 2015 +0200
  69. fc2ec8f ddr: altera: Clean up rw_mgr_mem_calibrate_writes_center() part 4 by Marek Vasut · Tue Jul 21 05:32:49 2015 +0200
  70. 1bb221e ddr: altera: Clean up rw_mgr_mem_calibrate_writes_center() part 3 by Marek Vasut · Tue Jul 21 05:29:05 2015 +0200
  71. 4e79b0a ddr: altera: Clean up rw_mgr_mem_calibrate_writes_center() part 2 by Marek Vasut · Tue Jul 21 05:26:58 2015 +0200
  72. affbc89 ddr: altera: Clean up rw_mgr_mem_calibrate_writes_center() part 1 by Marek Vasut · Tue Jul 21 05:00:42 2015 +0200
  73. 9cdbb96 ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 11 by Marek Vasut · Tue Jul 21 04:27:32 2015 +0200
  74. d29f804 ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 10 by Marek Vasut · Sat Jul 18 20:44:28 2015 +0200
  75. dfed1e6 ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 9 by Marek Vasut · Sat Jul 18 20:42:27 2015 +0200
  76. b69c247 ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 8 by Marek Vasut · Sat Jul 18 20:34:00 2015 +0200
  77. f1b8f71 ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 7 by Marek Vasut · Sat Jul 18 19:57:12 2015 +0200
  78. 89feb50 ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 6 by Marek Vasut · Sat Jul 18 19:46:26 2015 +0200
  79. aa0e6e1 ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 5 by Marek Vasut · Sat Jul 18 19:18:06 2015 +0200
  80. ca8ea37 ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 4 by Marek Vasut · Sat Jul 18 08:01:45 2015 +0200
  81. 85cd4d7 ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 3 by Marek Vasut · Mon Jul 13 02:48:34 2015 +0200
  82. e624caf ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 2 by Marek Vasut · Mon Jul 13 02:38:15 2015 +0200
  83. b20a506 ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 1 by Marek Vasut · Mon Jul 13 02:11:02 2015 +0200
  84. 4a78cc7 ddr: altera: Clean up rw_mgr_mem_calibrate_writes() by Marek Vasut · Sat Jul 18 07:23:25 2015 +0200
  85. 656002e ddr: altera: Clean up rw_mgr_mem_calibrate_read_test() part 5 by Marek Vasut · Mon Jul 20 03:26:05 2015 +0200
  86. 50a780f ddr: altera: Clean up rw_mgr_mem_calibrate_read_test() part 4 by Marek Vasut · Sun Jul 19 07:57:28 2015 +0200
  87. 28957f3 ddr: altera: Clean up rw_mgr_mem_calibrate_read_test() part 3 by Marek Vasut · Sun Jul 19 07:51:17 2015 +0200
  88. c6c1fe7 ddr: altera: Clean up rw_mgr_mem_calibrate_read_test() part 2 by Marek Vasut · Sun Jul 19 07:48:58 2015 +0200
  89. a005c77 ddr: altera: Clean up rw_mgr_mem_calibrate_read_test() part 1 by Marek Vasut · Sun Jul 19 07:44:21 2015 +0200
  90. a50d5d7 ddr: altera: Clean up rw_mgr_mem_calibrate_read_test_all_ranks() by Marek Vasut · Sun Jul 19 07:35:36 2015 +0200
  91. ec4bbd3 ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase() part 7 by Marek Vasut · Mon Jul 20 09:11:09 2015 +0200
  92. 28dbf12 ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase() part 6 by Marek Vasut · Mon Jul 20 09:20:42 2015 +0200
  93. 59729a6 ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase() part 5 by Marek Vasut · Mon Jul 20 09:20:20 2015 +0200
  94. 6ff36b7 ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase() part 4 by Marek Vasut · Sun Jul 19 07:27:06 2015 +0200
  95. deebda8 ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase() part 3 by Marek Vasut · Sun Jul 19 07:03:15 2015 +0200
  96. 970539d ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase() part 2 by Marek Vasut · Sun Jul 19 07:00:26 2015 +0200
  97. 4896bcc ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase() part 1 by Marek Vasut · Sun Jul 19 02:42:21 2015 +0200
  98. 088eb21 ddr: altera: Clean up find_vfifo_read() by Marek Vasut · Sun Jul 19 06:45:43 2015 +0200
  99. 42e43ab ddr: altera: Clean up rw_mgr_*_vfifo() part 2 by Marek Vasut · Sun Jul 19 06:37:51 2015 +0200
  100. 1c9f25b ddr: altera: Clean up rw_mgr_*_vfifo() part 1 by Marek Vasut · Sun Jul 19 06:25:27 2015 +0200