commit | 45ce296d20aeb395a5ef0a7ac058fb84bd6b6609 | [log] [tgz] |
---|---|---|
author | Marek Vasut <marex@denx.de> | Mon Apr 04 17:28:16 2016 +0200 |
committer | Marek Vasut <marex@denx.de> | Wed Apr 20 11:28:44 2016 +0200 |
tree | ae45e6bcfb09551775df7068f8d94a9406ac087a | |
parent | 6946989ec9c0694fc9aec682f1f79f426c422ad7 [diff] |
ddr: altera: Fix scc_mgr_set() argument order The code should be setting registers to zero, not one register to value. Swap the order of arguments to correct the behavior. The behavior is now in-line with code generated by Quartus 15.1 . Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>