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git01.mediatek.com / filogic / uboot / 016c25106cc01d8585fbc23bdd6547e95323c308 / arch / arm / mach-sunxi / dram_timings
  1. 75d38d0 sunxi: H6: Add DDR3-1333 timings by Andre Przywara · Mon Jul 15 02:27:08 2019 +0100
  2. 1c7a751 sunxi: H6: move LPDDR3 timing definition into separate file by Andre Przywara · Mon Jul 15 02:27:06 2019 +0100
  3. eb4766e sunxi: add LPDDR3 timing from stock boot0 by Icenowy Zheng · Sat Jun 03 17:10:24 2017 +0800
  4. e270a58 sunxi: add support for the DDR2 in V3s SoC by Icenowy Zheng · Sat Jun 03 17:10:20 2017 +0800
  5. f09b48e sunxi: Add selective DRAM type and timing by Icenowy Zheng · Sat Jun 03 17:10:18 2017 +0800