Raymond Mao | f4b933d | 2024-12-06 14:54:18 -0800 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| 2 | /* |
| 3 | * Copyright (c) 2024 Linaro Limited |
| 4 | * Author: Raymond Mao <raymond.mao@linaro.org> |
| 5 | */ |
| 6 | |
| 7 | #ifndef _SMBIOS_DEF_H_ |
| 8 | #define _SMBIOS_DEF_H_ |
| 9 | |
| 10 | /* |
| 11 | * BIOS characteristics |
| 12 | */ |
| 13 | |
| 14 | #define BIOS_CHARACTERISTICS_PCI_SUPPORTED 0x80 /* BIT(7) */ |
| 15 | #define BIOS_CHARACTERISTICS_UPGRADEABLE 0x800 /* BIT(11) */ |
| 16 | #define BIOS_CHARACTERISTICS_SELECTABLE_BOOT 0x10000 /* BIT(16) */ |
| 17 | |
| 18 | #define BIOS_CHARACTERISTICS_EXT1_ACPI 1 /* BIT(0) */ |
| 19 | #define BIOS_CHARACTERISTICS_EXT2_UEFI 8 /* BIT(3) */ |
| 20 | #define BIOS_CHARACTERISTICS_EXT2_TARGET 4 /* BIT(2) */ |
| 21 | |
| 22 | /* |
| 23 | * System Information |
| 24 | */ |
| 25 | |
| 26 | #define SMBIOS_WAKEUP_TYPE_RESERVED 0 |
| 27 | #define SMBIOS_WAKEUP_TYPE_OTHER 1 |
| 28 | #define SMBIOS_WAKEUP_TYPE_UNKNOWN 2 |
| 29 | #define SMBIOS_WAKEUP_TYPE_APM_TIMER 3 |
| 30 | #define SMBIOS_WAKEUP_TYPE_MODEM_RING 4 |
| 31 | #define SMBIOS_WAKEUP_TYPE_LAN_REMOTE 5 |
| 32 | #define SMBIOS_WAKEUP_TYPE_POWER_SWITCH 6 |
| 33 | #define SMBIOS_WAKEUP_TYPE_PCI_PME 7 |
| 34 | #define SMBIOS_WAKEUP_TYPE_AC_POWER_RESTORED 8 |
| 35 | |
| 36 | /* |
| 37 | * Baseboard Information |
| 38 | */ |
| 39 | |
| 40 | #define SMBIOS_BOARD_FEAT_HOST_BOARD 1 /* BIT(0) */ |
| 41 | #define SMBIOS_BOARD_FEAT_REQ_AUX 2 /* BIT(1) */ |
| 42 | #define SMBIOS_BOARD_FEAT_REMOVABLE 4 /* BIT(2) */ |
| 43 | #define SMBIOS_BOARD_FEAT_REPLACEABLE 8 /* BIT(3) */ |
| 44 | #define SMBIOS_BOARD_FEAT_HOT_SWAPPABLE 16 /* BIT(4) */ |
| 45 | |
| 46 | #define SMBIOS_BOARD_TYPE_UNKNOWN 1 |
| 47 | #define SMBIOS_BOARD_TYPE_OTHER 2 |
| 48 | #define SMBIOS_BOARD_TYPE_SERVER_BLADE 3 |
| 49 | #define SMBIOS_BOARD_TYPE_CON_SWITCH 4 |
| 50 | #define SMBIOS_BOARD_TYPE_SM_MODULE 5 |
| 51 | #define SMBIOS_BOARD_TYPE_PROCESSOR_MODULE 6 |
| 52 | #define SMBIOS_BOARD_TYPE_IO_MODULE 7 |
| 53 | #define SMBIOS_BOARD_TYPE_MEM_MODULE 8 |
| 54 | #define SMBIOS_BOARD_TYPE_DAUGHTER_BOARD 9 |
| 55 | #define SMBIOS_BOARD_TYPE_MOTHERBOARD 10 |
| 56 | #define SMBIOS_BOARD_TYPE_PROC_MEM_MODULE 11 |
| 57 | #define SMBIOS_BOARD_TYPE_PROC_IO_MODULE 12 |
| 58 | #define SMBIOS_BOARD_TYPE_INTERCON 13 |
| 59 | |
| 60 | /* |
| 61 | * System Enclosure or Chassis |
| 62 | */ |
| 63 | #define SMBIOS_ENCLOSURE_UNKNOWN 2 |
| 64 | #define SMBIOS_ENCLOSURE_DESKTOP 3 |
| 65 | |
| 66 | #define SMBIOS_STATE_OTHER 1 |
| 67 | #define SMBIOS_STATE_UNKNOWN 2 |
| 68 | #define SMBIOS_STATE_SAFE 3 |
| 69 | #define SMBIOS_STATE_WARNING 4 |
| 70 | #define SMBIOS_STATE_CRITICAL 5 |
| 71 | #define SMBIOS_STATE_NONRECOVERABLE 6 |
| 72 | |
| 73 | #define SMBIOS_SECURITY_OTHER 1 |
| 74 | #define SMBIOS_SECURITY_UNKNOWN 2 |
| 75 | #define SMBIOS_SECURITY_NONE 3 |
| 76 | #define SMBIOS_SECURITY_EXTINT_LOCK 4 |
| 77 | #define SMBIOS_SECURITY_EXTINT_EN 5 |
| 78 | |
| 79 | #define SMBIOS_ENCLOSURE_OEM_UND 0 |
| 80 | #define SMBIOS_ENCLOSURE_HEIGHT_UND 0 |
| 81 | #define SMBIOS_POWCORD_NUM_UND 0 |
| 82 | #define SMBIOS_ELEMENT_TYPE_SELECT 0x80 /* BIT(7) */ |
| 83 | |
| 84 | /* |
| 85 | * Processor Information |
| 86 | */ |
| 87 | |
| 88 | #define SMBIOS_PROCESSOR_TYPE_OTHER 1 |
| 89 | #define SMBIOS_PROCESSOR_TYPE_UNKNOWN 2 |
| 90 | #define SMBIOS_PROCESSOR_TYPE_CENTRAL 3 |
| 91 | #define SMBIOS_PROCESSOR_TYPE_MATH 4 |
| 92 | #define SMBIOS_PROCESSOR_TYPE_DSP 5 |
| 93 | #define SMBIOS_PROCESSOR_TYPE_VIDEO 6 |
| 94 | |
| 95 | #define SMBIOS_PROCESSOR_STATUS_UNKNOWN 0 |
| 96 | #define SMBIOS_PROCESSOR_STATUS_ENABLED 1 |
| 97 | #define SMBIOS_PROCESSOR_STATUS_DISABLED_USER 2 |
| 98 | #define SMBIOS_PROCESSOR_STATUS_DISABLED_BIOS 3 |
| 99 | #define SMBIOS_PROCESSOR_STATUS_IDLE 4 |
| 100 | #define SMBIOS_PROCESSOR_STATUS_OTHER 7 |
| 101 | |
| 102 | #define SMBIOS_PROCESSOR_UPGRADE_OTHER 1 |
| 103 | #define SMBIOS_PROCESSOR_UPGRADE_UNKNOWN 2 |
| 104 | #define SMBIOS_PROCESSOR_UPGRADE_NONE 6 |
| 105 | |
| 106 | #define SMBIOS_PROCESSOR_FAMILY_OTHER 1 |
| 107 | #define SMBIOS_PROCESSOR_FAMILY_UNKNOWN 2 |
| 108 | #define SMBIOS_PROCESSOR_FAMILY_RSVD 255 |
| 109 | #define SMBIOS_PROCESSOR_FAMILY_ARMV7 256 |
| 110 | #define SMBIOS_PROCESSOR_FAMILY_ARMV8 257 |
| 111 | #define SMBIOS_PROCESSOR_FAMILY_RV32 512 |
| 112 | #define SMBIOS_PROCESSOR_FAMILY_RV64 513 |
| 113 | |
| 114 | #define SMBIOS_PROCESSOR_FAMILY_EXT 0xfe |
| 115 | |
| 116 | /* Processor Characteristics */ |
| 117 | #define SMBIOS_PROCESSOR_RSVD 1 /* BIT(0) */ |
| 118 | #define SMBIOS_PROCESSOR_UND 2 /* BIT(1) */ |
| 119 | #define SMBIOS_PROCESSOR_64BIT 4 /* BIT(2) */ |
| 120 | #define SMBIOS_PROCESSOR_MULTICORE 8 /* BIT(3) */ |
| 121 | #define SMBIOS_PROCESSOR_HWTHREAD 16 /* BIT(4) */ |
| 122 | #define SMBIOS_PROCESSOR_EXEC_PROT 32 /* BIT(5) */ |
| 123 | #define SMBIOS_PROCESSOR_ENH_VIRT 64 /* BIT(6) */ |
| 124 | #define SMBIOS_PROCESSOR_POW_CON 0x80 /* BIT(7) */ |
| 125 | #define SMBIOS_PROCESSOR_128BIT 0x100 /* BIT(8) */ |
| 126 | #define SMBIOS_PROCESSOR_ARM64_SOCID 0x200 /* BIT(9) */ |
| 127 | |
| 128 | /* |
| 129 | * Cache Information |
| 130 | */ |
| 131 | |
| 132 | #define SMBIOS_CACHE_SIZE_EXT_KB (2047 * 1024) /* 2047 MiB */ |
| 133 | #define SMBIOS_CACHE_HANDLE_NONE 0xffff |
| 134 | |
| 135 | /* System Cache Type */ |
| 136 | #define SMBIOS_CACHE_SYSCACHE_TYPE_OTHER 1 |
| 137 | #define SMBIOS_CACHE_SYSCACHE_TYPE_UNKNOWN 2 |
| 138 | #define SMBIOS_CACHE_SYSCACHE_TYPE_INST 3 |
| 139 | #define SMBIOS_CACHE_SYSCACHE_TYPE_DATA 4 |
| 140 | #define SMBIOS_CACHE_SYSCACHE_TYPE_UNIFIED 5 |
| 141 | |
| 142 | /* Cache Speed */ |
| 143 | #define SMBIOS_CACHE_SPEED_UNKNOWN 0 |
| 144 | |
| 145 | /* SRAM Type */ |
| 146 | #define SMBIOS_CACHE_SRAM_TYPE_UNKNOWN 2 /* BIT(1) */ |
| 147 | |
| 148 | /* Error Correction Type */ |
| 149 | #define SMBIOS_CACHE_ERRCORR_OTHER 1 |
| 150 | #define SMBIOS_CACHE_ERRCORR_UNKNOWN 2 |
| 151 | #define SMBIOS_CACHE_ERRCORR_NONE 3 |
| 152 | #define SMBIOS_CACHE_ERRCORR_PARITY 4 |
| 153 | #define SMBIOS_CACHE_ERRCORR_SBITECC 5 |
| 154 | #define SMBIOS_CACHE_ERRCORR_MBITECC 6 |
| 155 | |
| 156 | /* Cache Configuration */ |
| 157 | #define SMBIOS_CACHE_LEVEL_1 0 |
| 158 | #define SMBIOS_CACHE_LEVEL_2 1 |
| 159 | #define SMBIOS_CACHE_LEVEL_3 2 |
| 160 | #define SMBIOS_CACHE_LEVEL_4 3 |
| 161 | #define SMBIOS_CACHE_LEVEL_5 4 |
| 162 | #define SMBIOS_CACHE_LEVEL_6 5 |
| 163 | #define SMBIOS_CACHE_LEVEL_7 6 |
| 164 | #define SMBIOS_CACHE_LEVEL_8 7 |
| 165 | #define SMBIOS_CACHE_SOCKETED 8 /* BIT(3) */ |
| 166 | #define SMBIOS_CACHE_LOCATE_EXTERNAL 32 /* BIT(5) */ |
| 167 | #define SMBIOS_CACHE_LOCATE_RESERVED 64 /* BIT(6) */ |
| 168 | #define SMBIOS_CACHE_LOCATE_UNKNOWN 96 /* (BIT(5) | BIT(6)) */ |
| 169 | #define SMBIOS_CACHE_ENABLED 0x80 /* BIT(7) */ |
| 170 | #define SMBIOS_CACHE_OP_WB 0x100 /* BIT(8), Write Back */ |
| 171 | #define SMBIOS_CACHE_OP_VAR 0x200 /* BIT(9), Varies with Memory Address */ |
| 172 | #define SMBIOS_CACHE_OP_UND 0x300 /* (BIT(8) | BIT(9)), Unknown*/ |
| 173 | |
| 174 | /* Cache Granularity */ |
| 175 | #define SMBIOS_CACHE_GRANU_1K 0 |
| 176 | #define SMBIOS_CACHE_GRANU_64K 1 |
| 177 | |
| 178 | /* Cache Associativity */ |
| 179 | #define SMBIOS_CACHE_ASSOC_OTHER 1 |
| 180 | #define SMBIOS_CACHE_ASSOC_UNKNOWN 2 |
| 181 | #define SMBIOS_CACHE_ASSOC_DMAPPED 3 |
| 182 | #define SMBIOS_CACHE_ASSOC_2WAY 4 |
| 183 | #define SMBIOS_CACHE_ASSOC_4WAY 5 |
| 184 | #define SMBIOS_CACHE_ASSOC_FULLY 6 |
| 185 | #define SMBIOS_CACHE_ASSOC_8WAY 7 |
| 186 | #define SMBIOS_CACHE_ASSOC_16WAY 8 |
| 187 | #define SMBIOS_CACHE_ASSOC_12WAY 9 |
| 188 | #define SMBIOS_CACHE_ASSOC_24WAY 10 |
| 189 | #define SMBIOS_CACHE_ASSOC_32WAY 11 |
| 190 | #define SMBIOS_CACHE_ASSOC_48WAY 12 |
| 191 | #define SMBIOS_CACHE_ASSOC_64WAY 13 |
| 192 | #define SMBIOS_CACHE_ASSOC_20WAY 14 |
| 193 | |
| 194 | #endif /* _SMBIOS_DEF_H_ */ |